AI Accelerator Design · All levels
Input-Stationary Dataflow
Dataflow Architectures: Input-stationary execution keeps activation tiles resident in local buffers or PE-adjacent storage while weights and partial sums stream through the compute fabric. This reduces repeated activation fetches from higher memory levels, which is valuable when feature-map bandwidth dominates energy. The design challenge is balancing local activation capacity with timely weight delivery and reduction routing so compute units remain occupied. Practical schedulers tune tile shape, preload depth, and multicast strategy to prevent contention that can erase expected reuse gains.
What this topic teaches
Input-Stationary Dataflow converts accelerator architecture concepts into release-ready engineering decisions. Input-stationary execution keeps activation tiles resident in local buffers or PE-adjacent storage while weights and partial sums stream through the compute fabric. This reduces repeated activation fetches from higher memory levels, which is valuable when feature-map bandwidth dominates energy. The design challenge is balancing local activation capacity with timely weight delivery and reduction routing so compute units remain occupied. Practical schedulers tune tile shape, preload depth, and multicast strategy to prevent contention that can erase expected reuse gains.
Senior-engineer framing question
When Activation reuse factor and input-buffer read traffic per tera-operations for representative convolution and GEMM layers. regresses, can you isolate the first failing execution mechanism, collect decisive evidence, assign owners, and close with rollback-safe validation?
ACCELERATOR EXECUTION FLOW - Input-Stationary Dataflow
request ingress and model metadata
|
v
graph lowering and kernel selection
|
v
tile/dataflow scheduling and memory placement
|
v
tensor execution + synchronization barriers
|
v
result assembly + quality/SLA validation
|
v
release decision and rollback guardrailsEvidence to collect
Primary metric: Activation reuse factor and input-buffer read traffic per tera-operations for representative convolution and GEMM layers..
Primary artifact: Traffic decomposition sheet showing activation residency, refill cadence, and bottleneck attribution by layer..
Owners to include: accelerator architect, memory hierarchy owner, compiler mapping owner, runtime scheduling owner.
One reproducible failing workload and one stable comparator run.
One fixed-metadata run with compiler/runtime/hardware tags locked.
Bandwidth lens
BANDWIDTH LENS - Input-Stationary Dataflow
working-set pressure
^
| saturation zone
| ----------------------------
| o unstable tail latency
| o tuning candidate
| o baseline behavior
+-------------------------------------> optimization iteration
Primary metric tracked:
Activation reuse factor and input-buffer read traffic per tera-operations for representative convolution and GEMM layers.Ownership layers
OWNERSHIP LAYERS - Input-Stationary Dataflow
+----------------------+--------------------------------+--------------------------------+
| Team | Primary responsibility | Closure artifact |
+----------------------+--------------------------------+--------------------------------+
| accelerator architect | mechanism and architecture intent| design rationale + tradeoffs |
| memory hierarchy owner | mapping, runtime, and execution | profile traces + bottleneck map|
| compiler mapping owner | correctness, risk, and signoff | test report + closure memo |
+----------------------+--------------------------------+--------------------------------+Key takeaways
Start with mechanism classification before changing tuning knobs.
Use one proving artifact for each major claim in review discussions.
Close with explicit owners, validation matrix, and rollback criteria.
Common pitfalls
Optimizing only peak throughput while p99 latency or quality regresses.
Mixing evidence captured from mismatched runtime or thermal conditions.
Declaring closure without production-like replay and guardrail checks.
AI accelerator deep dive
Dataflow choices are durable architecture decisions that shape memory and scheduling cost.
Concept diagram
DATAFLOW DECISION
input/output/weight stationary
-> locality pattern
-> movement cost
-> throughput and powerMetric graph
DATAFLOW COST MIX
activation traffic ███████
weight traffic █████
partial-sum traffic ██████Metrics and artifacts to collect
reuse factor map
buffer pressure profile
NoC traffic mix
shape sensitivity analysis
Mini case study
A dataflow that won for convolution lost on attention-heavy batches due to activation movement pressure.
Debug branches
Segment by model family
Compare reuse vs movement
Re-check mapping assumptions under batch variance
Senior review question
Ask: which first-principles bottleneck class explains the symptom, and what artifact proves it reproducibly?
Key takeaways
Tie every accelerator claim to a reproducible workload slice and one primary metric trend.
Prefer bounded fixes with clear owner and rollback boundary over broad tuning bundles.
Common pitfalls
Optimizing synthetic kernels without production-shape validation.
Reading average latency while ignoring p95 and p99 behavior.
Declaring sparse or precision wins without fallback and quality evidence.