AI Accelerator Design · All levels

Weight-Stationary Deep Dive: Inputs and Outputs

Inputs and Outputs for Weight-Stationary Deep Dive.

Inputs and outputs contract

Inputs and Outputs for Weight-Stationary Deep Dive is anchored on Off-array weight bandwidth per inference and achieved weight reuse across batch and sequence profiles.. Convert measurements into mechanism-backed decisions with clear owner accountability.

diagram
INPUTS
  - workload profile and SLA target
  - model precision and quality thresholds
  - compiler/runtime/firmware metadata
  - hardware operating envelope assumptions

OUTPUTS
  - evidence-backed bottleneck classification
  - owner-signed mitigation proposal
  - validation matrix with rollback triggers
  - release recommendation

Ownership split

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OWNERSHIP LAYERS - Weight-Stationary Deep Dive

+----------------------+--------------------------------+--------------------------------+
| Team                 | Primary responsibility         | Closure artifact               |
+----------------------+--------------------------------+--------------------------------+
| accelerator architect | mechanism and architecture intent| design rationale + tradeoffs   |
| compiler mapping owner | mapping, runtime, and execution   | profile traces + bottleneck map|
| SRAM subsystem owner | correctness, risk, and signoff    | test report + closure memo     |
+----------------------+--------------------------------+--------------------------------+

AI accelerator deep dive

Dataflow choices are durable architecture decisions that shape memory and scheduling cost.

Concept diagram

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DATAFLOW DECISION

input/output/weight stationary
  -> locality pattern
  -> movement cost
  -> throughput and power

Metric graph

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DATAFLOW COST MIX

activation traffic   ███████
weight traffic       █████
partial-sum traffic  ██████

Metrics and artifacts to collect

  • reuse factor map

  • buffer pressure profile

  • NoC traffic mix

  • shape sensitivity analysis

Mini case study

A dataflow that won for convolution lost on attention-heavy batches due to activation movement pressure.

Debug branches

  • Segment by model family

  • Compare reuse vs movement

  • Re-check mapping assumptions under batch variance

Senior review question

Ask: which first-principles bottleneck class explains the symptom, and what artifact proves it reproducibly?

Key takeaways

  • Tie every accelerator claim to a reproducible workload slice and one primary metric trend.

  • Prefer bounded fixes with clear owner and rollback boundary over broad tuning bundles.

Common pitfalls

  • Optimizing synthetic kernels without production-shape validation.

  • Reading average latency while ignoring p95 and p99 behavior.

  • Declaring sparse or precision wins without fallback and quality evidence.

Handoff explanation

Inputs should include workload profile, model revision, compiler/runtime versions, and platform power mode.

Outputs must include actionable interpretation of Off-array weight bandwidth per inference and achieved weight reuse across batch and sequence profiles., required artifacts (Reuse-and-bandwidth report mapping layer classes to weight residency and feeder utilization.), owner, and validation scope.

The ideal handoff packet is reproducible: fixed seeds, explicit baseline, and rejected alternatives.