AI Accelerator Design · All levels
Scratchpad vs Cache: Managed Locality Tradeoffs: Interview Drills
Interview Drills for Scratchpad vs Cache: Managed Locality Tradeoffs.
Interview drills
Interview Drills for Scratchpad vs Cache: Managed Locality Tradeoffs is anchored on Delivered throughput change and miss or spill overhead when moving a kernel between cache-managed and scratchpad-managed execution.. Convert measurements into mechanism-backed decisions with clear owner accountability.
PROMPT
You observe regression in Delivered throughput change and miss or spill overhead when moving a kernel between cache-managed and scratchpad-managed execution. for Scratchpad vs Cache: Managed Locality Tradeoffs. Explain root cause and release decision.
STRONG ANSWER
1. Defines workload and first failing mechanism.
2. Explains mechanism: Scratchpads expose explicit software control over placement, prefetch, and eviction, enabling predictable latency when access patterns are regular and compiler scheduling is mature. Hardware caches reduce software complexity and handle irregular reuse patterns automatically, but they can introduce nondeterministic misses and contention under multi-kernel interference. Most production systems blend both: critical tiles are pinned or staged through scratchpads while less predictable data uses cache paths. The choice should be based on measured reuse distance, synchronization pattern, and development cost, not ideology.
3. Requests proving artifact: Kernel locality decision matrix comparing cache and scratchpad policy by operator class.
4. Proposes bounded fix + owner + rollback-safe validation.
WEAK ANSWER
Gives generic optimization ideas without mechanism proof or ownership.AI accelerator deep dive
Memory hierarchy discipline sets the practical compute ceiling for AI accelerators.
Concept diagram
MEMORY HIERARCHY VIEW
register/SRAM -> shared buffers -> NoC -> HBM
locality quality decides how long compute stays fedMetric graph
MEMORY WALL SIGNALS
HBM near-saturation ███████████
NoC backpressure ███████
compute idle fraction █████Metrics and artifacts to collect
SRAM hit ratio
HBM utilization timeline
bank-conflict hotspots
NoC queue pressure
Mini case study
HBM channels saturated under burst traffic while compute occupancy dropped, proving a memory-bound regime.
Debug branches
Separate locality vs bandwidth limits
Quantify bank conflicts
Tune tiling before resizing compute arrays
Senior review question
Ask: which first-principles bottleneck class explains the symptom, and what artifact proves it reproducibly?
Key takeaways
Tie every accelerator claim to a reproducible workload slice and one primary metric trend.
Prefer bounded fixes with clear owner and rollback boundary over broad tuning bundles.
Common pitfalls
Optimizing synthetic kernels without production-shape validation.
Reading average latency while ignoring p95 and p99 behavior.
Declaring sparse or precision wins without fallback and quality evidence.
Interview answer expansion
A strong answer on Scratchpad vs Cache: Managed Locality Tradeoffs names the workload symptom, explains mechanism (Scratchpads expose explicit software control over placement, prefetch, and eviction, enabling predictable latency when access patterns are regular and compiler scheduling is mature. Hardware caches reduce software complexity and handle irregular reuse patterns automatically, but they can introduce nondeterministic misses and contention under multi-kernel interference. Most production systems blend both: critical tiles are pinned or staged through scratchpads while less predictable data uses cache paths. The choice should be based on measured reuse distance, synchronization pattern, and development cost, not ideology.), and proposes one measurable validation plan.
Then it identifies owner and fallback action if the proposed fix under-delivers.
The goal is practical engineering reasoning, not keyword listing.