AI Accelerator Design · All levels

Array Scaling and Utilization: Review Checklist

Review Checklist for Array Scaling and Utilization.

Review checklist

Review Checklist for Array Scaling and Utilization is anchored on Realized utilization, TOPS/W, and latency scaling as array dimensions increase under fixed memory system constraints.. Convert measurements into mechanism-backed decisions with clear owner accountability.

  • Workload scope and SLA targets are explicit.

  • Environment metadata is locked and reproducible.

  • Mechanism classification is evidence-backed.

  • Owner, rollback trigger, and validation matrix are documented.

  • Owners signed: accelerator architect, system architect, memory subsystem owner, compiler/runtime owner, capacity planning owner.

AI accelerator deep dive

Systolic efficiency is governed by feed quality, tile fit, and bubble control.

Concept diagram

diagram
SYSTOLIC WAVEFLOW

operand stream -> wavefront launch -> PE mesh compute -> reduction/writeback
                         ^ bubbles and feed stalls reduce realized throughput

Metric graph

diagram
UTILIZATION LOSSES

tile mismatch      ███████
feed stalls        █████████
sync bubbles       █████

Metrics and artifacts to collect

  • mesh occupancy timeline

  • fill-drain overhead

  • tile mismatch histogram

  • DRAM stall attribution

Mini case study

Increasing mesh size did not help until scheduling and tile alignment removed persistent wavefront bubbles.

Debug branches

  • Measure bubble source first

  • Classify compute vs memory starvation

  • Tune tile policy before frequency changes

Senior review question

Ask: which first-principles bottleneck class explains the symptom, and what artifact proves it reproducibly?

Key takeaways

  • Tie every accelerator claim to a reproducible workload slice and one primary metric trend.

  • Prefer bounded fixes with clear owner and rollback boundary over broad tuning bundles.

Common pitfalls

  • Optimizing synthetic kernels without production-shape validation.

  • Reading average latency while ignoring p95 and p99 behavior.

  • Declaring sparse or precision wins without fallback and quality evidence.

Review checklist explanation

Checklist quality determines whether teams close on proof or on optimism.

Minimum packet: metric trend (Realized utilization, TOPS/W, and latency scaling as array dimensions increase under fixed memory system constraints.), artifact set (Scaling study pack with roofline plots, shape-wise utilization histograms, and bottleneck attribution.), bottleneck class, owner fix, rollback trigger, and validation matrix.

If precision changes are involved, include quality guardrail evidence for each deployment slice.