AI Accelerator Design · All levels
Output-Stationary Dataflow: Inputs and Outputs
Inputs and Outputs for Output-Stationary Dataflow.
Inputs and outputs contract
Inputs and Outputs for Output-Stationary Dataflow is anchored on Partial-sum spill rate and accumulator energy per output element across matrix and convolution workloads.. Convert measurements into mechanism-backed decisions with clear owner accountability.
INPUTS
- workload profile and SLA target
- model precision and quality thresholds
- compiler/runtime/firmware metadata
- hardware operating envelope assumptions
OUTPUTS
- evidence-backed bottleneck classification
- owner-signed mitigation proposal
- validation matrix with rollback triggers
- release recommendationOwnership split
OWNERSHIP LAYERS - Output-Stationary Dataflow
+----------------------+--------------------------------+--------------------------------+
| Team | Primary responsibility | Closure artifact |
+----------------------+--------------------------------+--------------------------------+
| microarchitecture owner | mechanism and architecture intent| design rationale + tradeoffs |
| numeric precision owner | mapping, runtime, and execution | profile traces + bottleneck map|
| compiler mapping owner | correctness, risk, and signoff | test report + closure memo |
+----------------------+--------------------------------+--------------------------------+AI accelerator deep dive
Systolic efficiency is governed by feed quality, tile fit, and bubble control.
Concept diagram
SYSTOLIC WAVEFLOW
operand stream -> wavefront launch -> PE mesh compute -> reduction/writeback
^ bubbles and feed stalls reduce realized throughputMetric graph
UTILIZATION LOSSES
tile mismatch ███████
feed stalls █████████
sync bubbles █████Metrics and artifacts to collect
mesh occupancy timeline
fill-drain overhead
tile mismatch histogram
DRAM stall attribution
Mini case study
Increasing mesh size did not help until scheduling and tile alignment removed persistent wavefront bubbles.
Debug branches
Measure bubble source first
Classify compute vs memory starvation
Tune tile policy before frequency changes
Senior review question
Ask: which first-principles bottleneck class explains the symptom, and what artifact proves it reproducibly?
Key takeaways
Tie every accelerator claim to a reproducible workload slice and one primary metric trend.
Prefer bounded fixes with clear owner and rollback boundary over broad tuning bundles.
Common pitfalls
Optimizing synthetic kernels without production-shape validation.
Reading average latency while ignoring p95 and p99 behavior.
Declaring sparse or precision wins without fallback and quality evidence.
Handoff explanation
Inputs should include workload profile, model revision, compiler/runtime versions, and platform power mode.
Outputs must include actionable interpretation of Partial-sum spill rate and accumulator energy per output element across matrix and convolution workloads., required artifacts (Accumulator sizing and spill analysis with precision budget and writeback frequency breakdown.), owner, and validation scope.
The ideal handoff packet is reproducible: fixed seeds, explicit baseline, and rejected alternatives.