AI Accelerator Design · All levels

Weight-Stationary Dataflow: Worked Example

Worked Example for Weight-Stationary Dataflow.

Worked example

Worked Example for Weight-Stationary Dataflow is anchored on Weight reuse factor and off-array weight bandwidth per tera-operations for representative inference layers.. Convert measurements into mechanism-backed decisions with clear owner accountability.

A regression appears in Weight reuse factor and off-array weight bandwidth per tera-operations for representative inference layers.. Strong closure isolates first failing stage, proves mechanism, applies one reversible fix, and validates blast radius before release.

Execution lens

diagram
ACCELERATOR EXECUTION FLOW - Weight-Stationary Dataflow

request ingress and model metadata
      |
      v
graph lowering and kernel selection
      |
      v
tile/dataflow scheduling and memory placement
      |
      v
tensor execution + synchronization barriers
      |
      v
result assembly + quality/SLA validation
      |
      v
release decision and rollback guardrails

Decision matrix

diagram
EVIDENCE MATRIX - Weight-Stationary Dataflow

+-----------------------------+--------------------------------+--------------------------------+---------------------------+
| Evidence                    | Tells you                      | Does not prove                 | Next action               |
+-----------------------------+--------------------------------+--------------------------------+---------------------------+
| occupancy + timeline traces | where utilization is lost      | precise root cause             | map to memory and schedule|
| cache/SRAM/bandwidth stats  | data movement pressure         | model-level quality impact     | correlate with quality run|
| counter + profile alignment | bottleneck class confidence    | rollout safety                 | run full regression matrix|
| thermal/power telemetry     | sustained operating envelope   | correctness closure            | pair with verification    |
| before/after scenario pack  | mitigation movement            | long-tail stability            | execute guardrail replay  |
+-----------------------------+--------------------------------+--------------------------------+---------------------------+

AI accelerator deep dive

Systolic efficiency is governed by feed quality, tile fit, and bubble control.

Concept diagram

diagram
SYSTOLIC WAVEFLOW

operand stream -> wavefront launch -> PE mesh compute -> reduction/writeback
                         ^ bubbles and feed stalls reduce realized throughput

Metric graph

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UTILIZATION LOSSES

tile mismatch      ███████
feed stalls        █████████
sync bubbles       █████

Metrics and artifacts to collect

  • mesh occupancy timeline

  • fill-drain overhead

  • tile mismatch histogram

  • DRAM stall attribution

Mini case study

Increasing mesh size did not help until scheduling and tile alignment removed persistent wavefront bubbles.

Debug branches

  • Measure bubble source first

  • Classify compute vs memory starvation

  • Tune tile policy before frequency changes

Senior review question

Ask: which first-principles bottleneck class explains the symptom, and what artifact proves it reproducibly?

Key takeaways

  • Tie every accelerator claim to a reproducible workload slice and one primary metric trend.

  • Prefer bounded fixes with clear owner and rollback boundary over broad tuning bundles.

Common pitfalls

  • Optimizing synthetic kernels without production-shape validation.

  • Reading average latency while ignoring p95 and p99 behavior.

  • Declaring sparse or precision wins without fallback and quality evidence.

Worked-example reasoning

Suppose Weight reuse factor and off-array weight bandwidth per tera-operations for representative inference layers. regresses only under burst traffic. The shallow response is clock scaling. The stronger response is to inspect queueing, mapping, and memory-pressure interactions first.

If occupancy drops with high memory stalls, prioritize locality and scheduling fixes. If occupancy remains high with latency spikes, inspect contention and fairness policy.

Pick one bounded change per hypothesis and validate against baseline artifacts.