Analog for Digital Engineers · All levels

ADCs (Analog-to-Digital): Tricky Q&A

Senior interview and review questions for ADCs (Analog-to-Digital).

Section Q&A bank

Use these drills after completing all topics in ADCs (Analog-to-Digital). Answer with context, mechanism proof, artifact, owner, and release decision.

A design samples at 80 MS/s and claims 35 MHz signal bandwidth without an anti-alias filter because Nyquist is 40 MHz. Why is this unsafe?

diagram
[INT][ANALOG][DATA-CONVERTERS-ADC]

Q: A design samples at 80 MS/s and claims 35 MHz signal bandwidth without an anti-alias filter because Nyquist is 40 MHz. Why is this unsafe?

A:
Nyquist only defines alias folding boundaries; it does not suppress out-of-band energy. Any interferer above 40 MHz (or image content from analog front-end nonidealities) folds into baseband and can corrupt the 35 MHz band. Real designs need front-end filtering sized to expected blocker levels and sampling-clock phase-noise constraints, not just a nominal fs/2 check.

FOLLOW-UP TRAP: Equating Nyquist compliance with automatic anti-alias protection.

Why can a pipeline ADC outperform SAR in high-speed systems even if raw comparator performance is similar?

diagram
[INT][ANALOG][DATA-CONVERTERS-ADC]

Q: Why can a pipeline ADC outperform SAR in high-speed systems even if raw comparator performance is similar?

A:
Pipeline stages process different samples concurrently, so throughput scales with stage cadence instead of full-resolution bit-cycling per sample. SAR must complete sequential decision cycles and DAC settling for each conversion, which becomes a bottleneck at high rates. Pipeline keeps throughput high at the cost of latency, residue-amplifier linearity burden, and calibration infrastructure.

FOLLOW-UP TRAP: Comparing only single-comparator speed and ignoring architectural concurrency.

A delta-sigma ADC advertises very high resolution. Why might in-band performance still disappoint in a real product?

diagram
[INT][ANALOG][DATA-CONVERTERS-ADC]

Q: A delta-sigma ADC advertises very high resolution. Why might in-band performance still disappoint in a real product?

A:
The headline resolution assumes intended OSR, stable loop behavior, clean reference/clocking, and a decimation filter configuration aligned with signal bandwidth. Reduced OSR, clock jitter, idle tones, reference coupling, or insufficient decimation rejection can leak shaped noise/spurs into the passband. System integration mistakes can erase theoretical noise-shaping gains quickly.

FOLLOW-UP TRAP: Treating noise-shaping theory as guaranteed field performance.

Two ADCs show similar ENOB, but one has much worse SFDR. Which is better for blocker-rich RF sensing and why?

diagram
[INT][ANALOG][DATA-CONVERTERS-ADC]

Q: Two ADCs show similar ENOB, but one has much worse SFDR. Which is better for blocker-rich RF sensing and why?

A:
The higher-SFDR ADC is usually better because blocker-rich environments are limited by deterministic spurs that can mask weak tones or create false detections. ENOB/SNDR summarizes overall noise-plus-distortion power, but SFDR isolates worst-case spur dominance, which directly impacts spectral dynamic range and detection reliability under strong adjacent signals.

FOLLOW-UP TRAP: Assuming ENOB alone predicts spectral usability in spur-sensitive applications.

Q&A drill guide

diagram
SYMPTOM -> ANALOG MECHANISM -> EVIDENCE -> OWNER ACTION -> VALIDATION

Sketch while answering

diagram
ADC VALIDATION FLOW

front-end assumptions -> sampler behavior -> quantization path -> metric interpretation

Common traps

  • Verify coherent sampling and FFT setup before root-cause claims.

  • Classify whether loss is noise, distortion, or folded interference.

  • Audit architecture-fit assumptions against workload bandwidth.

Key takeaways

  • Tie every analog claim to one measurable metric and one proving artifact.

  • Prefer minimal reversible mitigations with explicit owner and rollback criteria.

Common pitfalls

  • Treating all noise as one scalar instead of path and frequency dependent behavior.

  • Changing multiple analog knobs at once and losing causality.

  • Declaring closure from nominal behavior without stress replay evidence.