Analog for Digital Engineers · All levels

Devices & Building-Block Circuits

A practical analog primer for digital engineers: how MOSFET operation, bias generation, feedback amplifiers, and thresholding or switching circuits behave in real silicon and shape system-level robustness.

Section goal

A practical analog primer for digital engineers: how MOSFET operation, bias generation, feedback amplifiers, and thresholding or switching circuits behave in real silicon and shape system-level robustness.

How to study this section

  1. Start with each topic hub and restate the mechanism in your own words.

  2. Use reports and debug pages to classify first failing boundaries.

  3. Practice worked examples and interview drills under fixed setup metadata.

  4. Close with checklist and execution impact before signoff claims.

Topics

  1. mosfet-operating-regions/ - MOSFET Operating Regions, gm, and Small-Signal Intuition

  2. current-mirrors-and-references/ - Current Mirrors, Bias Trees, and Bandgap Reference Basics

  3. opamp-basics/ - Op-Amp Gain, Bandwidth, and Feedback Stability Foundations

  4. comparators-and-switches/ - Comparators, Hysteresis, and Analog Switch Behavior

Related topics

Analog deep dive

Device and circuit intuition links transistor-level behavior to system-level reliability and calibration burden.

Concept diagram

diagram
CIRCUIT REASONING FLOW

device region -> small-signal model -> loop behavior -> integration risk

Metric graph

diagram
CIRCUIT RISK MIX

headroom collapse        ████
loop peaking             █████
bias drift               ███

Metrics and artifacts to collect

  • operating-region and headroom map

  • bias drift and compliance checks

  • loop-stability margin report

  • offset and hysteresis validation

Mini case study

Nominal functionality hid compliance failures that only appeared under low-voltage corners and realistic load profiles.

Debug branches

  • Verify operating region assumptions before topology changes.

  • Separate static bias errors from dynamic stability behavior.

  • Track where calibration is masking core circuit weakness.

Senior review question

Ask: which source-path-victim boundary failed first, and which artifact proves it reproducibly?