Supply Noise Coupling Paths and PSRR Across Frequency

What this topic teaches

Supply Noise Coupling Paths and PSRR Across Frequency turns analog principles into staff-level mixed-signal execution decisions. Power-supply noise reaches sensitive nodes through finite gain-stage rejection, bias mirrors, substrate coupling, package parasitics, and shared return inductance that converts di/dt into local ground bounce. PSRR is strongly frequency-dependent: low-frequency rejection can be high due to loop gain, then collapse near amplifier poles where feedthrough and parasitic capacitances dominate. Digital switching regulators and clock trees inject deterministic ripple and harmonics that can mix with signal paths, creating spurs in converters and sidebands in PLL or SerDes clocks. Robust design combines local decoupling impedance shaping, low-noise references/LDO partitioning, star-domain isolation strategy, and layout discipline (current return control, guard structures, deep-nwell where available), while system teams validate worst-case coupling using realistic package/board impedance and simultaneous-switching activity.

Senior-engineer framing question

When PSRR(dB) versus frequency, output spur amplitude at switching harmonics, and supply-induced ENOB/SNDR degradation. regresses, can you isolate the first failing boundary, prove the mechanism, assign owner, and close with rollback-safe validation?

ANALOG EXECUTION FLOW - Supply Noise Coupling Paths and PSRR Across Frequency

assumptions and operating profile
      |
      v
source-path-victim mapping
      |
      v
measurement/model evidence
      |
      v
bounded mitigation and replay
      |
      v
release decision with rollback guard

Evidence to collect

• Primary metric: PSRR(dB) versus frequency, output spur amplitude at switching harmonics, and supply-induced ENOB/SNDR degradation..

• Primary artifact: End-to-end supply-coupling map from board rail to critical analog nodes with PSRR-vs-frequency limits and spur budget signoff..

• Owners to include: power integrity owner, analog macro designer, package and board engineer, SoC integration owner, post-silicon validation owner.

• One reproducible failing workload and one controlled comparator run.

• One fixed metadata run with board, mode, and environmental tags locked.

Ownership layers

OWNERSHIP LAYERS - Supply Noise Coupling Paths and PSRR Across Frequency

+----------------------+--------------------------------+--------------------------------+
| Team                 | Primary responsibility         | Closure artifact               |
+----------------------+--------------------------------+--------------------------------+
| power integrity owner | mechanism and margin ownership  | design rationale + constraints |
| analog macro designer | integration and runtime behavior | contract + telemetry evidence  |
| package and board engineer | bench closure and rollout gates | stress matrix + signoff memo   |
+----------------------+--------------------------------+--------------------------------+

Decision matrix

EVIDENCE MATRIX - Supply Noise Coupling Paths and PSRR Across Frequency

+-----------------------------+--------------------------------+--------------------------------+---------------------------+
| Evidence                    | Tells you                      | Does not prove                 | Next action               |
+-----------------------------+--------------------------------+--------------------------------+---------------------------+
| setup calibration logs      | measurement chain validity     | mechanism root cause           | pair with transfer checks |
| spectrum and jitter plots   | frequency-domain behavior      | ownership of failure           | correlate with activity   |
| PVT corner overlays         | sensitivity distribution       | runtime workload equivalence   | add workload replay       |
| model-vs-silicon deltas     | assumption mismatch classes    | direct fix correctness         | test bounded mitigation   |
| before-after matrix         | mitigation movement            | long-term field drift          | run stress suites         |
+-----------------------------+--------------------------------+--------------------------------+---------------------------+

Key takeaways

• Classify mechanism and boundary before proposing architecture-wide fixes.

• Tie each claim to one proving artifact and one accountable owner.

• Close with stress replay and explicit rollback criteria.

Common pitfalls

• Treating nominal-corner success as sufficient closure evidence.

• Changing multiple analog knobs and losing causality.

• Skipping setup-fidelity audits before attributing failures to silicon.

Analog deep dive

Noise and SI closure is achieved by frequency-aware path analysis, not one-number guard-bands.

Concept diagram

NOISE PATH VIEW

source -> transfer function -> victim sensitivity -> system margin

Metric graph

NOISE CLOSURE

path unknown             ██████
path classified          █████████
validated mitigations    ███████

Metrics and artifacts to collect

• white/1-f noise decomposition

• PSRR versus frequency profile

• alias-folding sensitivity map

• phase-noise to jitter integration summary

Mini case study

A broadband spur issue persisted until teams modeled package and return-path coupling instead of relying on low-frequency PSRR numbers.

Debug branches

• Classify deterministic versus random contributors first.

• Map dominant transfer path before adding generic filtering.

• Use operating-mode-specific aggressor profiles in validation.

Senior review question

Ask: which source-path-victim boundary failed first, and which artifact proves it reproducibly?

Key takeaways

• Tie every analog claim to one measurable metric and one proving artifact.

• Prefer minimal reversible mitigations with explicit owner and rollback criteria.

Common pitfalls

• Treating all noise as one scalar instead of path and frequency dependent behavior.

• Changing multiple analog knobs at once and losing causality.

• Declaring closure from nominal behavior without stress replay evidence.