ISA & Programmer Model

Section goal

Instruction semantics, encoding strategy, ABI contracts, and privilege behavior that define the software-visible CPU contract.

How to study this section

1. Start with each topic hub to establish mechanism-first framing.

2. Use reports and debug pages to separate symptoms from root cause.

3. Practice worked examples and interview drills under fixed metadata.

4. Close with checklist and silicon impact before signoff claims.

Topics

1. isa-encoding-and-formats/ - ISA Encoding and Formats

2. risc-vs-cisc-tradeoffs/ - RISC vs CISC Tradeoffs

3. abi-and-calling-conventions/ - ABI and Calling Conventions

4. privilege-and-exception-model/ - Privilege and Exception Model

Related topics

• CPU Design course hub

CPU deep dive

ISA choices are software contracts that directly become decode, verification, and security cost in silicon.

Concept diagram

ISA CONTRACT STACK

instruction semantics -> encoding -> decode/uOP expansion -> architectural state

Metric graph

ISA HEALTH TREND

illegal encoding escapes     █
decode expansion pressure    ████
ABI mismatch incidents       ██

Reports and artifacts

• instruction legality audit

• decode critical-path report

• ABI conformance summary

• trap/CSR latency sheet

Mini case study

A late ISA extension looked harmless but increased decode expansion ratio and pushed front-end timing beyond closure margin.

Debug branches

• Map each ISA feature to decode and retire implications

• Separate architectural correctness from microarchitectural cost

• Validate privileged behavior with precise-state traces

Senior review question

Ask: which CPI/latency evidence proves this topic is truly closed beyond synthetic benchmarks?