Out-of-Order Execution

Section goal

Rename, scheduling, and retirement machinery that extracts ILP while preserving precise architectural behavior.

How to study this section

1. Start with each topic hub to establish mechanism-first framing.

2. Use reports and debug pages to separate symptoms from root cause.

3. Practice worked examples and interview drills under fixed metadata.

4. Close with checklist and silicon impact before signoff claims.

Topics

1. rename-and-reorder-buffer/ - Rename and Reorder Buffer

2. reservation-stations-scheduling/ - Reservation Stations Scheduling

3. register-renaming-mechanics/ - Register Renaming Mechanics

4. commit-retire-and-recovery/ - Commit, Retire, and Recovery

Related topics

• CPU Design course hub

CPU deep dive

OoO gains come from balanced rename, scheduling, and retire machinery rather than deeper buffers alone.

Concept diagram

OOO CONTROL LOOP

rename -> dispatch -> issue queues -> execute -> ROB retire -> checkpoint recovery

Metric graph

OOO PRESSURE SHARE

rename stalls        ████
scheduler wait       █████
retire throttles     ███

Reports and artifacts

• ROB occupancy history

• rename stall attribution

• wakeup-select timing report

• recovery latency profile

Mini case study

A deeper ROB improved synthetic ILP but increased recovery latency during branch-heavy production traffic.

Debug branches

• Track free-list and map-table pressure by phase

• Separate scheduler inefficiency from execution-port limits

• Measure post-flush recovery slope before and after fixes

Senior review question

Ask: which CPI/latency evidence proves this topic is truly closed beyond synthetic benchmarks?