DRAM & Memory Design · All levels

QoS Classes, Priority Arbitration, and Starvation Boundaries: Review Checklist

Review Checklist for QoS Classes, Priority Arbitration, and Starvation Boundaries.

Review checklist

Review Checklist for QoS Classes, Priority Arbitration, and Starvation Boundaries focuses on Per-class latency SLA compliance (real-time, interactive, best-effort) and fairness index under stress traffic.. The purpose is to turn memory observations into mechanism-backed actions with explicit owners and release-safe validation.

  • Workload scope and SLA targets are explicit.

  • Environment tags are locked and reproducible.

  • First failing transition is proven by command-level evidence.

  • Owner and rollback criteria are documented.

  • Validation matrix covers performance, stability, and reliability.

  • Owners signed: memory controller architect, SoC QoS architect, NoC owner, firmware power/performance owner, silicon validation owner.

DRAM deep dive

Controller policy decides whether DRAM serves locality, fairness, and QoS targets simultaneously.

Concept diagram

diagram
CONTROLLER SCHEDULING LOOP

request queues -> row-policy + priority -> command issue -> bank state update

Metric graph

diagram
QUEUE PRESSURE MIX

row-hit preference bias ██████
aging/fairness pressure █████
QoS override cost       ███

Reports and artifacts

  • scheduler policy comparison

  • queue age distribution

  • starvation/fairness incident report

  • QoS latency percentile dashboard

Mini case study

FR-FCFS tuning improved bulk throughput but starved latency-critical traffic until age caps and class quotas were added.

Debug branches

  • Measure queue age tails by traffic class

  • Separate row-hit gains from fairness regressions

  • Stress policy under mixed burst and random streams

Senior review question

Ask: which latency, bandwidth, and reliability evidence proves this DRAM topic is closed under real traffic?

Key takeaways

  • Always tie controller and PHY counter shifts to application latency and throughput outcomes.

  • Lock firmware timing profile, thermal condition, and DIMM state before comparing DRAM captures.

Common pitfalls

  • Chasing peak bandwidth while ignoring p99 latency and fairness tails.

  • Changing timing guardbands without separating SI noise from scheduling issues.

  • Declaring closure without reliability gates, fault injection, and regression replay.

Review checklist explanation

A checklist here protects against false closure. Every item should map to a known memory failure mode.

For QoS Classes, Priority Arbitration, and Starvation Boundaries, minimum checklist: workload scope, Per-class latency SLA compliance (real-time, interactive, best-effort) and fairness index under stress traffic., artifact evidence (QoS compliance dashboard with per-class SLA miss counters, arbitration decision logs, and starvation watchdog events.), bottleneck class, owner, rollback path, and corner-matrix validation.

If controller or firmware changed, include fairness and RAS checks. If PHY or package assumptions changed, include SI/PI and thermal guardband evidence.