Scenario: ECC + Rowhammer Escape

Scenario

Fleet telemetry shows rising corrected errors near a narrow address region, followed by a rare uncorrectable event after an adversarial access burst. Existing TRR policy and patrol scrub are enabled.

OBSERVED METRIC
Localized CE slope increase preceding a rowhammer-correlated UE escape.

45-MINUTE INTERVIEW FLOW
0-5: scope traffic and SLA context
5-15: map first failing DRAM transition
15-25: identify proving artifacts
25-35: propose bounded fix with owner
35-45: state validation matrix and rollback

Common pitfalls

• Close on ECC presence alone without hammer-threshold characterization.

• Increase scrub globally without quantifying bandwidth and risk tradeoff.

• Ignore address-mapping hotspot concentration during mitigation review.

Scenario debrief

Score candidate response on traffic framing, timing proof, mitigation boundedness, and regression discipline.

request stream -> controller policy -> DRAM timing behavior -> measured outcome

latency/bandwidth trend

Debrief prompts

1. Which DRAM timing or queue behavior fails first in evidence?

2. Which smallest safe controller, PHY, or policy change addresses it?

3. Which benchmark + counter gate proves closure under production traffic?

Key takeaways

• Always tie controller and PHY counter shifts to application latency and throughput outcomes.

• Lock firmware timing profile, thermal condition, and DIMM state before comparing DRAM captures.

Common pitfalls

• Chasing peak bandwidth while ignoring p99 latency and fairness tails.

• Changing timing guardbands without separating SI noise from scheduling issues.

• Declaring closure without reliability gates, fault injection, and regression replay.