Low Power Verification · All levels

Power-Aware Sim Setup: Debug Playbook

Debug Playbook for Power-Aware Sim Setup.

Debug playbook

Debug Playbook for Power-Aware Sim Setup is anchored on illegal transition rate, corruption incidence, and deterministic replay quality under low-power scenarios. Convert observations into mechanism-backed and owner-bound actions.

  1. Freeze seed, metadata, and boundary under investigation.

  2. Locate first persistent low-power phase divergence.

  3. Classify mechanism: setup, transition, boundary, retention, or X-prop class.

  4. Apply one focused reproducer and one bounded fix.

  5. Re-run determinism and broader regression matrix.

Review memo template

diagram
LPV REVIEW MEMO - Power-Aware Simulation / Power-Aware Sim Setup

1. Symptom
   - Failing metric: illegal transition rate, corruption incidence, and deterministic replay quality under low-power scenarios
   - Trigger context: <seed/mode/sequence>
   - First failing phase: <entry/off/exit/boundary>

2. Mechanism hypothesis
   - Candidate mechanism: Enable power-aware behavior by compiling RTL with UPF and turning on simulator low-power semantics, not just loading the UPF file passively. Bind domains, power states, and legal transition sequences to a testbench power controller model, then verify that the simulator is actually honoring supply set state and power state table constraints. A robust setup includes reset and boot sequencing across multiple domains, assertion hooks for illegal state transitions, and waveform observability for both logical and supply-state events so debug starts from first failure instead of post-hoc guesswork.
   - Competing hypotheses: setup, transition race, boundary bug, retention drift, X-prop noise
   - Missing evidence: <trace/assertion/report>

3. Proposed action
   - Smallest reversible change: <intent/RTL/checker/flow>
   - Expected movement: <failure trend/replay stability>
   - Regression risk: compatibility, coverage, signoff delay

4. Signoff
   - Required artifact: evidence packet for Power-Aware Sim Setup: transition timeline, assertions, and before-after replay summary
   - Required owners: LPV lead, power-intent owner, Power-Aware Simulation owner
   - Final decision: ship, bounded rollout, rollback, or escalate

Low-power verification deep dive

Power-aware simulation quality is measured by realistic transition behavior and actionable failure classification.

Concept diagram

diagram
POWER-AWARE SIM FLOW

UPF + RTL + testbench -> elaboration -> transition simulation -> assertions and triage

Metric graph

diagram
SIM QUALITY SIGNALS

false-fail noise      █████
actionable failures   ███████
deterministic replay  ████████

Metrics and artifacts to collect

  • elaboration semantic report

  • power-aware run reproducibility matrix

  • corruption and clamp behavior summary

  • assertion signal-to-noise trend

Mini case study

A noisy regression became actionable after bucketing failures by transition phase and boundary type before fixing checks.

Debug branches

  • Start from first failing phase, not final mismatch.

  • Check semantic setup consistency before declaring design bug.

  • Use one reproducible scenario per hypothesis branch.

Senior review question

Ask: what exact low-power transition boundary failed first, and which artifact proves the closure claim reproducibly?

Key takeaways

  • Tie each LPV claim to a concrete transition boundary and one proving artifact.

  • Prefer minimal reversible fixes with explicit owner and rollback criteria.

Common pitfalls

  • Treating power-aware failures as random before boundary classification.

  • Waiving X-prop failures before proving impact and root cause.

  • Declaring closure without deterministic replay across key modes.

Debug ladder

Sequence: reproduce -> classify -> isolate boundary -> prove mechanism -> bounded fix.

Avoid mixed fixes before first-principles classification.