Power State Verification

Section goal

Verification strategy for power-state tables, legal and illegal transition checking, mode sequencing handshakes, and coverage closure across interacting power domains.

How to study this section

1. Start with each topic hub and restate boundary mechanism in your own words.

2. Use reports and debug pages to classify first failing low-power phase.

3. Practice worked examples and interview drills under fixed metadata.

4. Close with checklist and execution impact before signoff claims.

Topics

1. power-state-tables/ - Power State Tables (PST) and UPF Intent Consistency

2. pst-transition-checks/ - Legal and Illegal PST Transition Checks

3. power-mode-sequencing/ - Power Mode Sequencing and Handshake Robustness

4. multi-domain-state-coverage/ - Coverage Across Multiple Power Domains

Related topics

• Low Power Verification course hub

Low-power verification deep dive

Power-state correctness is a protocol contract: legal transitions, robust sequencing, and safe concurrent event handling.

Concept diagram

PST CONTROL LOOP

state request -> legality check -> handshake sequencing -> mode entry -> monitored exit

Metric graph

STATE RISK MIX

illegal transitions     ██████
sequence race bugs      █████
stable mode paths       ████████

Metrics and artifacts to collect

• PST legality matrix

• illegal transition histogram

• entry/exit handshake coverage

• mode sequencing anomaly log

Mini case study

A sporadic low-power failure closed only after proving a wake-versus-thermal race in PMU transition sequencing.

Debug branches

• Validate legal state graph first.

• Stress concurrent control events and asynchronous wakeups.

• Bind fixes to explicit transition and owner contracts.

Senior review question

Ask: what exact low-power transition boundary failed first, and which artifact proves the closure claim reproducibly?