Low Power Verification · All levels

Coverage Across Multiple Power Domains: Debug Playbook

Debug Playbook for Coverage Across Multiple Power Domains.

Debug playbook

Debug Playbook for Coverage Across Multiple Power Domains is anchored on Risk-weighted coverage closure for domain-state cross products, inter-domain transition pairs, and wakeup cause by mode combinations.. Convert observations into mechanism-backed and owner-bound actions.

Freeze seed, metadata, and boundary under investigation.
Locate first persistent low-power phase divergence.
Classify mechanism: setup, transition, boundary, retention, or X-prop class.
Apply one focused reproducer and one bounded fix.
Re-run determinism and broader regression matrix.

Review memo template

diagram

LPV REVIEW MEMO - Power State Verification / Coverage Across Multiple Power Domains

1. Symptom
   - Failing metric: Risk-weighted coverage closure for domain-state cross products, inter-domain transition pairs, and wakeup cause by mode combinations.
   - Trigger context: <seed/mode/sequence>
   - First failing phase: <entry/off/exit/boundary>

2. Mechanism hypothesis
   - Candidate mechanism: Single-domain closure is insufficient once domains interact through shared clocks, buses, memory, and always-on control planes; coverage must capture cross-domain state combinations and transition interleavings that expose dependency bugs. Practical coverage models avoid combinational explosion by grouping states into risk classes (fully-on, retention, collapsed, transitional) and prioritizing high-impact intersections such as producer-off/consumer-on, shared-memory retention mismatches, and staggered wakeups across coherency participants. Each bin should tie to an observable correctness objective: no X-propagation into active logic, no stale data after restore, no orphaned transaction during domain collapse, and no interrupt loss across wake sequences. Signoff quality comes from merging simulation, emulation, and formal evidence into one closure view so unhit bins are triaged by silicon risk rather than waived on raw percentage pressure.
   - Competing hypotheses: setup, transition race, boundary bug, retention drift, X-prop noise
   - Missing evidence: <trace/assertion/report>

3. Proposed action
   - Smallest reversible change: <intent/RTL/checker/flow>
   - Expected movement: <failure trend/replay stability>
   - Regression risk: compatibility, coverage, signoff delay

4. Signoff
   - Required artifact: Multi-domain coverage plan with cross-product reduction rules, risk-ranked bins, and signoff waiver criteria.
   - Required owners: verification lead, SoC low-power architect, emulation and prototyping owner, formal coverage owner, program quality owner
   - Final decision: ship, bounded rollout, rollback, or escalate

Low-power verification deep dive

Power-state correctness is a protocol contract: legal transitions, robust sequencing, and safe concurrent event handling.

Concept diagram

diagram

PST CONTROL LOOP

state request -> legality check -> handshake sequencing -> mode entry -> monitored exit

Metric graph

diagram

STATE RISK MIX

illegal transitions     ██████
sequence race bugs      █████
stable mode paths       ████████

Metrics and artifacts to collect

PST legality matrix
illegal transition histogram
entry/exit handshake coverage
mode sequencing anomaly log

Mini case study

A sporadic low-power failure closed only after proving a wake-versus-thermal race in PMU transition sequencing.

Debug branches

Validate legal state graph first.
Stress concurrent control events and asynchronous wakeups.
Bind fixes to explicit transition and owner contracts.

Senior review question

Ask: what exact low-power transition boundary failed first, and which artifact proves the closure claim reproducibly?

Key takeaways

Tie each LPV claim to a concrete transition boundary and one proving artifact.
Prefer minimal reversible fixes with explicit owner and rollback criteria.

Common pitfalls

Treating power-aware failures as random before boundary classification.
Waiving X-prop failures before proving impact and root cause.
Declaring closure without deterministic replay across key modes.

Debug ladder

Sequence: reproduce -> classify -> isolate boundary -> prove mechanism -> bounded fix.

Avoid mixed fixes before first-principles classification.

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