Low Power Verification · All levels
Power State Tables (PST) and UPF Intent Consistency: Design Space
Design Space for Power State Tables (PST) and UPF Intent Consistency.
Design space exploration
For Power State Tables (PST) and UPF Intent Consistency, teams balance safety, closure speed, and simulation or debug cost.
Option A - conservative
Conservative controls: helps strong safety and clarity
Risk: higher setup and runtime overhead
Validate with: new LPV program bring-up
Option B - balanced
Balanced controls: helps good closure velocity
Risk: needs disciplined review
Validate with: shared platform verification
Option C - aggressive
Aggressive optimization: helps lower overhead
Risk: higher corner-case risk
Validate with: mature flows with strong telemetry
Option D - refactor
Refactor path: helps long-term robustness
Risk: migration cost
Validate with: legacy LPV debt cleanup
DESIGN SPACE - Power State Tables (PST) and UPF Intent Consistency
coverage depth <-> simulation/runtime cost <-> debug clarity <-> residual riskDesign pitfalls
Optimizing runtime before proving intent-correctness boundaries.
Adding checks without ownership of closure and triage workflow.
Low-power verification deep dive
Power-state correctness is a protocol contract: legal transitions, robust sequencing, and safe concurrent event handling.
Concept diagram
PST CONTROL LOOP
state request -> legality check -> handshake sequencing -> mode entry -> monitored exitMetric graph
STATE RISK MIX
illegal transitions ██████
sequence race bugs █████
stable mode paths ████████Metrics and artifacts to collect
PST legality matrix
illegal transition histogram
entry/exit handshake coverage
mode sequencing anomaly log
Mini case study
A sporadic low-power failure closed only after proving a wake-versus-thermal race in PMU transition sequencing.
Debug branches
Validate legal state graph first.
Stress concurrent control events and asynchronous wakeups.
Bind fixes to explicit transition and owner contracts.
Senior review question
Ask: what exact low-power transition boundary failed first, and which artifact proves the closure claim reproducibly?
Key takeaways
Tie each LPV claim to a concrete transition boundary and one proving artifact.
Prefer minimal reversible fixes with explicit owner and rollback criteria.
Common pitfalls
Treating power-aware failures as random before boundary classification.
Waiving X-prop failures before proving impact and root cause.
Declaring closure without deterministic replay across key modes.
Principal LPV review addendum
Power State Tables (PST) and UPF Intent Consistency should be reviewed as a transition integrity system, not just isolated checks.
Use PST legality closure (allowed states vs observed states) and count of state-encoding mismatches between UPF, firmware tables, and RTL control logic. as alarm and PST intent traceability matrix linking UPF states to RTL control points, firmware enums, and per-state assertion bundles. as proof.
Power-state verification is a protocol verification problem: legal transitions, ordering contracts, and corner-case concurrency. Closure quality comes from reproducible evidence and explicit owners.