Low Power Verification · All levels

Power State Tables (PST) and UPF Intent Consistency: Interview Drills

Interview Drills for Power State Tables (PST) and UPF Intent Consistency.

Interview drills

Interview Drills for Power State Tables (PST) and UPF Intent Consistency is anchored on PST legality closure (allowed states vs observed states) and count of state-encoding mismatches between UPF, firmware tables, and RTL control logic.. Convert observations into mechanism-backed and owner-bound actions.

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PROMPT
You observe regression in PST legality closure (allowed states vs observed states) and count of state-encoding mismatches between UPF, firmware tables, and RTL control logic. for Power State Tables (PST) and UPF Intent Consistency. Explain root cause and release decision.

STRONG ANSWER
1. Defines failing phase and workload context.
2. Explains mechanism: Power state tables define the legal combinations of domain supplies, isolation intent, retention expectations, and always-on dependencies, but real bugs appear when equivalent state names map to different electrical assumptions across UPF, RTL, and firmware. Verification must treat PST as an executable contract: each state declaration is cross-checked against switch controls, clamp polarity, retention save/restore windows, and clock/reset prerequisites before simulation even starts. During dynamic runs, monitors should reconstruct effective domain state from actual control signals and compare it against the declared PST tuple, including intermediate settle windows where supply ramps, isolation asserts, and reset deassert order can temporarily violate assumptions. A robust flow also validates forbidden composite states that are not directly requested by software but can emerge from asynchronous updates or watchdog recovery paths, because those illegal combinations often create silent corruption rather than immediate protocol failures.
3. Requests proving artifact: PST intent traceability matrix linking UPF states to RTL control points, firmware enums, and per-state assertion bundles.
4. Proposes bounded fix + owner + rollback-safe validation.

WEAK ANSWER
Gives generic low-power advice without mechanism proof, evidence, or ownership.

Low-power verification deep dive

Power-state correctness is a protocol contract: legal transitions, robust sequencing, and safe concurrent event handling.

Concept diagram

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PST CONTROL LOOP

state request -> legality check -> handshake sequencing -> mode entry -> monitored exit

Metric graph

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STATE RISK MIX

illegal transitions     ██████
sequence race bugs      █████
stable mode paths       ████████

Metrics and artifacts to collect

  • PST legality matrix

  • illegal transition histogram

  • entry/exit handshake coverage

  • mode sequencing anomaly log

Mini case study

A sporadic low-power failure closed only after proving a wake-versus-thermal race in PMU transition sequencing.

Debug branches

  • Validate legal state graph first.

  • Stress concurrent control events and asynchronous wakeups.

  • Bind fixes to explicit transition and owner contracts.

Senior review question

Ask: what exact low-power transition boundary failed first, and which artifact proves the closure claim reproducibly?

Key takeaways

  • Tie each LPV claim to a concrete transition boundary and one proving artifact.

  • Prefer minimal reversible fixes with explicit owner and rollback criteria.

Common pitfalls

  • Treating power-aware failures as random before boundary classification.

  • Waiving X-prop failures before proving impact and root cause.

  • Declaring closure without deterministic replay across key modes.

Principal LPV review addendum

Power State Tables (PST) and UPF Intent Consistency should be reviewed as a transition integrity system, not just isolated checks.

Use PST legality closure (allowed states vs observed states) and count of state-encoding mismatches between UPF, firmware tables, and RTL control logic. as alarm and PST intent traceability matrix linking UPF states to RTL control points, firmware enums, and per-state assertion bundles. as proof.

Power-state verification is a protocol verification problem: legal transitions, ordering contracts, and corner-case concurrency. Closure quality comes from reproducible evidence and explicit owners.