Retention Registers and Cell-Level Verification

What this topic teaches

Retention Registers and Cell-Level Verification converts LPV concepts into staff-level verification decisions. Retention verification starts by proving that the retained register set in RTL, UPF, and implementation netlists is consistent, complete, and intentionally minimal. Verification environments should cross-check retention control pins, clamp behavior, and always-on rail dependencies so that retained flops never see illegal biasing during collapse. At cell level, teams validate save-node integrity, retention latch behavior, and restore propagation timing under realistic power ramp profiles, not just ideal transitions. Directed and constrained-random tests should include partial domain shutdown, asynchronous reset overlap, and scan/test mode interactions because many escapes occur when retention intent collides with debug infrastructure. Coverage should map each protected register class to at least one stress scenario that proves both value preservation and legal re-entry into functional state machines.

Senior-engineer framing question

When Retention restore correctness across intended register list, wake-up latency bins, and voltage-corner pass rate. regresses, can you isolate first failing low-power boundary, prove it with artifacts, assign owners, and close with rollback-safe validation?

LOW-POWER VERIFICATION FLOW - Retention Registers and Cell-Level Verification

power intent and mode definitions
      |
      v
domain controls and transition sequencing
      |
      v
simulation behavior (isolation, retention, corruption)
      |
      v
assertions and coverage evidence
      |
      v
triage, bounded fix, and signoff closure

Evidence to collect

• Primary metric: Retention restore correctness across intended register list, wake-up latency bins, and voltage-corner pass rate..

• Primary artifact: Retention intent traceability matrix linking RTL registers, UPF strategies, implementation cells, and pass/fail evidence by power scenario..

• Owners to include: low-power verification owner, UPF/power intent owner, library characterization owner, implementation/signoff owner.

• One reproducible failing scenario and one stable comparator run.

• One fixed metadata run with branch and configuration tags locked.

Ownership layers

OWNERSHIP LAYERS - Retention Registers and Cell-Level Verification

+----------------------+--------------------------------+--------------------------------+
| Team                 | Primary responsibility         | Closure artifact               |
+----------------------+--------------------------------+--------------------------------+
| low-power verification owner | scenario intent and closure      | review rationale memo          |
| UPF/power intent owner | transition and boundary contract | timeline + assertion packet    |
| library characterization owner | regression signoff readiness     | validation matrix + risk note  |
+----------------------+--------------------------------+--------------------------------+

Decision matrix

EVIDENCE MATRIX - Retention Registers and Cell-Level Verification

+-----------------------------+--------------------------------+--------------------------------+---------------------------+
| Evidence                    | Tells you                      | Does not prove                 | Next action               |
+-----------------------------+--------------------------------+--------------------------------+---------------------------+
| transition timeline traces  | first failing LP phase         | complete root-cause ownership  | correlate with intent map |
| UPF-aware assertion logs    | contract violations by phase   | silicon product impact         | map to scenario severity  |
| corruption/X classification | actionable vs noisy failures   | legal transition completeness  | replay key mode corners   |
| save/restore snapshots      | state integrity movement       | isolation correctness          | pair with crossing checks |
| before-after regressions    | mitigation movement quality    | long-tail stability            | run full matrix           |
+-----------------------------+--------------------------------+--------------------------------+---------------------------+

Key takeaways

• Start with transition-boundary classification before broad methodology changes.

• Tie each LPV claim to one proving artifact and one owner action.

• Close with validation matrix and rollback trigger for signoff safety.

Common pitfalls

• Waiving failures before first-failure boundary classification.

• Changing intent, RTL, and checkers in one step and losing causality.

• Declaring closure on local runs without broader replay coverage.

Low-power verification deep dive

Retention closure requires proving end-to-end state lifecycle through save, off, and restore windows.

Concept diagram

RETENTION LIFECYCLE

save request -> state capture -> power off -> power on -> restore -> traffic resume

Metric graph

RETENTION STABILITY

restore mismatch       █████
save timing defects    ████
stable wake cycles     ███████

Metrics and artifacts to collect

• retention save/restore timing report

• pre/post state diff matrix

• multi-cycle retention stress summary

• state-loss bug trend by mode

Mini case study

A corruption issue persisted until retention checks compared multi-cycle state snapshots rather than single wake events.

Debug branches

• Track save acknowledgement against actual state capture.

• Validate restore completion before functional traffic resumes.

• Run repeated sleep/wake cycles to expose drift.

Senior review question

Ask: what exact low-power transition boundary failed first, and which artifact proves the closure claim reproducibly?

Key takeaways

• Tie each LPV claim to a concrete transition boundary and one proving artifact.

• Prefer minimal reversible fixes with explicit owner and rollback criteria.

Common pitfalls

• Treating power-aware failures as random before boundary classification.

• Waiving X-prop failures before proving impact and root cause.

• Declaring closure without deterministic replay across key modes.