AI for VLSI · All levels
Reading Path
Suggested learning paths by role.
By role
RTL/verification engineer: math basics -> neural basics -> ML in verification/test -> deployment stack.
PD/STA engineer: compute hardware -> accelerator architecture -> ML timing/power prediction.
Architecture lead: roofline + precision -> dataflow + memory -> accelerator sizing scenarios.
CAD/EDA owner: training pipeline -> EDA ML workflows -> MLOps governance.