Low Power Verification · All levels

Retention Registers and Cell-Level Verification: Debug Playbook

Debug Playbook for Retention Registers and Cell-Level Verification.

Debug playbook

Debug Playbook for Retention Registers and Cell-Level Verification is anchored on Retention restore correctness across intended register list, wake-up latency bins, and voltage-corner pass rate.. Convert observations into mechanism-backed and owner-bound actions.

Freeze seed, metadata, and boundary under investigation.
Locate first persistent low-power phase divergence.
Classify mechanism: setup, transition, boundary, retention, or X-prop class.
Apply one focused reproducer and one bounded fix.
Re-run determinism and broader regression matrix.

Review memo template

diagram

LPV REVIEW MEMO - Retention & Restore / Retention Registers and Cell-Level Verification

1. Symptom
   - Failing metric: Retention restore correctness across intended register list, wake-up latency bins, and voltage-corner pass rate.
   - Trigger context: <seed/mode/sequence>
   - First failing phase: <entry/off/exit/boundary>

2. Mechanism hypothesis
   - Candidate mechanism: Retention verification starts by proving that the retained register set in RTL, UPF, and implementation netlists is consistent, complete, and intentionally minimal. Verification environments should cross-check retention control pins, clamp behavior, and always-on rail dependencies so that retained flops never see illegal biasing during collapse. At cell level, teams validate save-node integrity, retention latch behavior, and restore propagation timing under realistic power ramp profiles, not just ideal transitions. Directed and constrained-random tests should include partial domain shutdown, asynchronous reset overlap, and scan/test mode interactions because many escapes occur when retention intent collides with debug infrastructure. Coverage should map each protected register class to at least one stress scenario that proves both value preservation and legal re-entry into functional state machines.
   - Competing hypotheses: setup, transition race, boundary bug, retention drift, X-prop noise
   - Missing evidence: <trace/assertion/report>

3. Proposed action
   - Smallest reversible change: <intent/RTL/checker/flow>
   - Expected movement: <failure trend/replay stability>
   - Regression risk: compatibility, coverage, signoff delay

4. Signoff
   - Required artifact: Retention intent traceability matrix linking RTL registers, UPF strategies, implementation cells, and pass/fail evidence by power scenario.
   - Required owners: low-power verification owner, UPF/power intent owner, library characterization owner, implementation/signoff owner
   - Final decision: ship, bounded rollout, rollback, or escalate

Low-power verification deep dive

Retention closure requires proving end-to-end state lifecycle through save, off, and restore windows.

Concept diagram

diagram

RETENTION LIFECYCLE

save request -> state capture -> power off -> power on -> restore -> traffic resume

Metric graph

diagram

RETENTION STABILITY

restore mismatch       █████
save timing defects    ████
stable wake cycles     ███████

Metrics and artifacts to collect

retention save/restore timing report
pre/post state diff matrix
multi-cycle retention stress summary
state-loss bug trend by mode

Mini case study

A corruption issue persisted until retention checks compared multi-cycle state snapshots rather than single wake events.

Debug branches

Track save acknowledgement against actual state capture.
Validate restore completion before functional traffic resumes.
Run repeated sleep/wake cycles to expose drift.

Senior review question

Ask: what exact low-power transition boundary failed first, and which artifact proves the closure claim reproducibly?

Key takeaways

Tie each LPV claim to a concrete transition boundary and one proving artifact.
Prefer minimal reversible fixes with explicit owner and rollback criteria.

Common pitfalls

Treating power-aware failures as random before boundary classification.
Waiving X-prop failures before proving impact and root cause.
Declaring closure without deterministic replay across key modes.

Debug ladder

Sequence: reproduce -> classify -> isolate boundary -> prove mechanism -> bounded fix.

Avoid mixed fixes before first-principles classification.

Practice this lesson