Low Power / UPF · All levels

Low Power / UPF Cheatsheet

Dense reference for transition debug, UPF signoff, and interview answers.

Debug order

diagram

TRANSITION -> POLICY -> METRIC -> ARTIFACT -> OWNER -> REGRESSION

Intent: domain/state table, policy objects, control polarities
Sequence: save/isolate/off/on/restore/release ordering
Crossings: isolation + level-shifter correctness
Implementation: LP cell placement, rail connectivity, AON integrity
Signoff: simulation + formal + implementation + waiver discipline

Questions before proposing a fix

Which transition and domain crossing actually failed first?
Is this policy intent mismatch, sequence ordering bug, or physical issue?
Which artifact proves the hypothesis?
Who owns the minimal reversible fix?
What full LP regression closes release risk?

Practice this lesson