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Course contents

  • Start Here6
  • SystemVerilog Language Foundations28
  • Object-Oriented SystemVerilog for Verification30
  • Constraint Randomization — Interview-Critical Deep Dive36
  • SystemVerilog Assertions — Interview-Critical Deep Dive40
  • Functional Coverage in SystemVerilog22
  • Testbench Architecture in SystemVerilog23
    • Testbench Anatomy & Layering
    • Stimulus: Generators, Transactions & Drivers
    • Monitors, Scoreboards & Reference Models
      • Monitor Design
      • Scoreboard Architecture
      • Compare and End-of-Test
      • Reference Models and Coverage
    • Self-Checking Tests & Regression
    • From Hand-Built TB to UVM
  • Advanced Language & Integration25
  • Senior & Interview Preparation21
  • Principal-Level Verification28
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‹Testbench Architecture in SystemVerilog
  1. Topics
  2. SystemVerilog
  3. Testbench Architecture in SystemVerilog
  4. Monitors, Scoreboards & Reference Models

Part 6 · Testbench Architecture · Intermediate

Monitors, Scoreboards & Reference Models

Passive monitors, scoreboards and reference models that prove a testbench checked the DUT.

  • 4topics
  • 4lessons

Stimulus alone proves nothing. A monitor passively rebuilds transactions from DUT pins, a reference model predicts what the DUT should have done, and a scoreboard compares the two streams.

Three rules carry the whole topic. The monitor never drives a signal, the scoreboard compares observed against predicted, and end-of-test checks prove compares happened before any PASS.

Checking-side topology: two passive observation paths meet in the scoreboard.
Checking-side topology: two passive observation paths meet in the scoreboard.

Lesson

What it covers

Monitor Design

Input-only sampling, accepted-beat reconstruction, one broadcast copy per consumer.

Scoreboard Architecture

FIFO compare for in-order DUTs, by-id lookup for out-of-order DUTs.

Compare and End-of-Test

Field masks, first-difference dumps, drain windows, watchdogs, leftover checks.

Reference Models and Coverage

Transaction-level predict functions and coverage sampled from observed traffic.

Check yourself A test passes but the scoreboard compared zero transactions. What went wrong with the verdict?

Nothing checked anything. The PASS is hollow: a broken generator, a miswired monitor, or a disabled driver all produce zero compares. End-of-test checks must fail an empty scoreboard.

Interview

“How do you know the test checked anything?” is the whole topic in one question. Answer with the three rules above, then offer the monitor sketch, the FIFO versus by-id choice, and the zero-compare guard.

Related topics

  • Self-checking regressions

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See also

  • Testbench Anatomy & Layering
  • Stimulus: Generators, Transactions & Drivers
  • Self-Checking Tests & Regression