Self-Checking Tests & Regression · SystemVerilog

Part 6 · Testbench Architecture · Intermediate

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A testbench that needs a human to read waveforms is a debug aid, not a verification environment. Self-checking means every test prints its own machine-greppable verdict and returns an exit code that automation can act on. Hundreds of such runs across seeds form a regression.

This topic covers the verdict contract, seeds and replay, logging that scripts can parse, and the flow from one testbench to a nightly regression.

One self-checking testbench scales into a regression: a matrix of runs, mechanical verdicts, bucketed triage, and seeded reruns.

Lesson	What it covers
Self-Checking Discipline	One error counter, one verdict banner, and an exit code that automation can trust.
Seeds & Reproducibility	Seed every run, print the seed, and replay any failure exactly.
Logging & Verbosity Strategy	Leveled log lines with scope and transaction ids that scripts can grep.
The Regression Flow	Dispatch the matrix in parallel, bucket failures by signature, and rerun to green.

Check yourself A run prints a PASS banner but the simulator exits non-zero. Does the regression count it as a pass?

No. A run passes only when the PASS banner is present and the exit code is zero. Anything else is a failure or an infrastructure problem.

Up nextSelf-Checking Discipline

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Lesson

What it covers

Self-Checking Discipline

One error counter, one verdict banner, and an exit code that automation can trust.

Seeds & Reproducibility

Seed every run, print the seed, and replay any failure exactly.

Logging & Verbosity Strategy

Leveled log lines with scope and transaction ids that scripts can grep.

The Regression Flow

Dispatch the matrix in parallel, bucket failures by signature, and rerun to green.