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Course contents

  • How to Use This Course
  • Low-Power Metrics Reference
  • Low-Power Glossary
  • Reading Path
  • Power Intent Fundamentals61
  • Isolation & Retention61
  • Level Shifters & Power Switches61
    • Level Shifter Selection
    • Power Switch Architecture
      • Power Switch Architecture: Mechanism
      • Power Switch Architecture: Inputs & Outputs
      • Power Switch Architecture: Reports & Metrics
      • Power Switch Architecture: Debug Playbook
      • Power Switch Architecture: Worked Example
      • Power Switch Architecture: Pitfalls & Red Flags
      • Power Switch Architecture: Interview Drills
      • Power Switch Architecture: Review Checklist
      • Power Switch Architecture: Theory Deep Dive
      • Power Switch Architecture: Design Space
      • Power Switch Architecture: Expanded Case Study
      • Power Switch Architecture: Step-by-Step Walkthrough
      • Power Switch Architecture: Comparison Matrix
      • Power Switch Architecture: Software / Programmer View
      • Power Switch Architecture: Silicon PPA Impact
    • Rush Current Mitigation
    • Always-On Logic
    • Level Shifters & Power Switches: Tricky Q&A
  • UPF Implementation Flow61
  • Low Power Verification61
  • PD & Power Grid Integration61
  • Low Power Interview Prep4
  • Low Power / UPF Cheatsheet
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‹Level Shifters & Power Switches
  1. Topics
  2. Low-Power Design
  3. Level Shifters & Power Switches
  4. Power Switch Architecture

Low Power / UPF · All levels

Power Switch Architecture

Level Shifters & Power Switches: Header/footer switch networks gate domain supplies; sizing and distribution determine rush current, IR behavior, and wake-up stability.

  • 15topics
  • 15lessons

Topics in this section

  1. 1Power Switch Architecture: Mechanism1 lesson
  2. 2Power Switch Architecture: Inputs & Outputs1 lesson
  3. 3Power Switch Architecture: Reports & Metrics1 lesson
  4. 4Power Switch Architecture: Debug Playbook1 lesson
  5. 5Power Switch Architecture: Worked Example1 lesson
  6. 6Power Switch Architecture: Pitfalls & Red Flags1 lesson
  7. 7Power Switch Architecture: Interview Drills1 lesson
  8. 8Power Switch Architecture: Review Checklist1 lesson
  9. 9Power Switch Architecture: Theory Deep Dive1 lesson
  10. 10Power Switch Architecture: Design Space1 lesson
  11. 11Power Switch Architecture: Expanded Case Study1 lesson
  12. 12Power Switch Architecture: Step-by-Step Walkthrough1 lesson
  13. 13Power Switch Architecture: Comparison Matrix1 lesson
  14. 14Power Switch Architecture: Software / Programmer View1 lesson
  15. 15Power Switch Architecture: Silicon PPA Impact1 lesson
On this page

    What this topic teaches

    Power Switch Architecture translates low-power intent into release-grade evidence. Header/footer switch networks gate domain supplies; sizing and distribution determine rush current, IR behavior, and wake-up stability. The practical challenge is proving policy correctness under real transitions and ensuring each owner closes their layer without semantic drift.

    The senior-engineer question

    When switch IR drop, enable skew, and power-up settle time regresses, can you identify the failing transition, policy owner, implementation evidence, and minimum regression that proves closure?

    Diagram
    POWER INTENT FLOW — Power Switch Architecture
    
    architecture intent
          |
          v
    UPF objects (domain/supply/state/strategy)
          |
          v
    RTL + synthesis + PD interpretation
          |
          v
    verification + signoff evidence
          |
          v
    release decision
    
    Primary metric: switch IR drop, enable skew, and power-up settle time

    Picture the low-power flow

    Start with domain/state diagrams before diving into logs. These are the models to sketch in design and interview reviews.

    Switch bank topology

    Diagram
    POWER GATING TOPOLOGY
    
    VDD_MAIN --[switch bank stage0]--[stage1]---> VDD_SW
                   | controls staggered by PMU |
    
    Switch density and placement drive IR + wake-up behavior.

    Domain map

    Diagram
    POWER DOMAIN MAP — Power Switch Architecture
    
      +------------------- always_on -------------------+
      | PMU / control / retention rail                  |
      +---------+----------------------------+----------+
                |                            |
       +--------v---------+         +--------v---------+
       | domain_A         |         | domain_B         |
       | switchable       |<------->| switchable       |
       | iso/ret controls | crossings require policy   |
       +------------------+         +------------------+
    
    Domain boundaries are policy boundaries, not drawing boundaries.

    State transition path

    Diagram
    STATE TRANSITIONS — Power Switch Architecture
    
    ON  --save-->  RETENTION  --off-->  OFF
     ^               |                    |
     |               +----restore<--------+
     +--------------------power_up--------+
    
    Guard checks:
      - isolation asserted before OFF
      - restore before functional traffic
      - reset policy consistent with retained state

    Ownership layers

    Diagram
    LP OWNERSHIP LAYERS — Power Switch Architecture
    
    layer                owns                          typical failure
    ------------------   ---------------------------   --------------------------
    architecture         domain strategy               infeasible power states
    UPF intent           policy objects + bindings     wrong/missing policy
    implementation       LP cell insertion/routing     illegal physical behavior
    verification         transition scenarios          uncovered LP bug
    signoff governance   waiver + release decisions    late escape to silicon

    Evidence to collect

    • Primary metric: switch IR drop, enable skew, and power-up settle time.

    • Primary artifact: switch topology diagram, rail ramp waveform, and IR signoff snapshot.

    • Owners to bring into review: low-power architect, PD power owner, signoff owner.

    • One failing transition timeline with state markers and control signals.

    • One report snippet proving policy intent versus implementation behavior.

    Ownership map

    Diagram
    OWNERSHIP MAP — Power Switch Architecture
    
    artifact              owner
    ----------------      -----------------
    intent policy       low-power architect
    implementation      PD power owner
    verification        signoff owner
    
    Escapes happen when ownership is implicit.

    Subpages in this topic

    Each topic is taught across mechanism, inputs/outputs, reports, debug, worked example, pitfalls, interview, checklist, theory, design space, expanded case study, walkthrough, comparison matrix, software view, and silicon impact.

    Key takeaways

    • Always name the transition context for every low-power metric.

    • Bind each policy decision to a specific owner and artifact.

    • Re-run LP simulation, formal, and implementation checks after changes.

    Common pitfalls

    • Treating static pass reports as transition closure.

    • Fixing symptoms without checking policy binding and sequence order.

    • Shipping with ambiguous ownership on open LP violations.

    Low-power deep dive

    Voltage translation and switch topology must be co-optimized with transition reliability.

    Concept diagram

    Diagram
    CROSSING + GATING
    
    domain crossing -> level shifter
    domain enable   -> staged switches

    Metric graph

    Diagram
    INRUSH RISK
    
    single-stage enable  █████████ high
    staged enable        ███       lower

    Reports and artifacts

    • LS insertion summary

    • switch enable schedule

    • inrush profile

    • AON control audit

    Mini case study

    Staged switch enable solved rail dip without violating wake latency budget.

    Debug branches

    • Check shifter direction map

    • Audit switch staging

    • Correlate with transient IR

    Senior review question

    Ask: what transition evidence proves this topic is closed, and which owner signs it?

    Key takeaways

    • State transition context must accompany every low-power metric claim.

    • Intent changes require simulation, formal, and implementation re-validation.

    Common pitfalls

    • Comparing results from mismatched UPF revisions.

    • Assuming static checks replace transition validation.

    • Shipping with aged waivers and unclear ownership.

    Execution drill pack 1

    Use this pack to rehearse low-power closure on low-power/level-shifters-switches/power-switch-architecture: transition framing, policy ownership, implementation evidence, and release confidence.

    Transition checklist

    • State transition explicitly named with legal source/target states.

    • Crossing and domain ownership are mapped and agreed.

    • Policy controls are traced to always-on source logic.

    • Waveform bookmarks align controls with state timestamps.

    Review prompts

    1. Which policy object is first to deviate from intent?

    2. Which owner can apply the smallest reversible fix?

    3. What regression matrix proves no collateral damage?

    4. Which waiver conditions would still block release?

    Evidence capsule

    Diagram
    LP EVIDENCE CAPSULE 1
    
    PATH: low-power/level-shifters-switches/power-switch-architecture
    STATE WINDOW: <from -> to>
    POLICY OBJECT: <isolation / retention / shifter / switch>
    OWNER: <name>
    PRIMARY ARTIFACT: <report/waveform/formal result>
    RELEASE DECISION: <close / bounded waiver / escalate>

    Execution drill pack 2

    Use this pack to rehearse low-power closure on low-power/level-shifters-switches/power-switch-architecture: transition framing, policy ownership, implementation evidence, and release confidence.

    Transition checklist

    • State transition explicitly named with legal source/target states.

    • Crossing and domain ownership are mapped and agreed.

    • Policy controls are traced to always-on source logic.

    • Waveform bookmarks align controls with state timestamps.

    Review prompts

    1. Which policy object is first to deviate from intent?

    2. Which owner can apply the smallest reversible fix?

    3. What regression matrix proves no collateral damage?

    4. Which waiver conditions would still block release?

    Evidence capsule

    Diagram
    LP EVIDENCE CAPSULE 2
    
    PATH: low-power/level-shifters-switches/power-switch-architecture
    STATE WINDOW: <from -> to>
    POLICY OBJECT: <isolation / retention / shifter / switch>
    OWNER: <name>
    PRIMARY ARTIFACT: <report/waveform/formal result>
    RELEASE DECISION: <close / bounded waiver / escalate>

    Execution drill pack 3

    Use this pack to rehearse low-power closure on low-power/level-shifters-switches/power-switch-architecture: transition framing, policy ownership, implementation evidence, and release confidence.

    Transition checklist

    • State transition explicitly named with legal source/target states.

    • Crossing and domain ownership are mapped and agreed.

    • Policy controls are traced to always-on source logic.

    • Waveform bookmarks align controls with state timestamps.

    Review prompts

    1. Which policy object is first to deviate from intent?

    2. Which owner can apply the smallest reversible fix?

    3. What regression matrix proves no collateral damage?

    4. Which waiver conditions would still block release?

    Evidence capsule

    Diagram
    LP EVIDENCE CAPSULE 3
    
    PATH: low-power/level-shifters-switches/power-switch-architecture
    STATE WINDOW: <from -> to>
    POLICY OBJECT: <isolation / retention / shifter / switch>
    OWNER: <name>
    PRIMARY ARTIFACT: <report/waveform/formal result>
    RELEASE DECISION: <close / bounded waiver / escalate>

    Execution drill pack 4

    Use this pack to rehearse low-power closure on low-power/level-shifters-switches/power-switch-architecture: transition framing, policy ownership, implementation evidence, and release confidence.

    Transition checklist

    • State transition explicitly named with legal source/target states.

    • Crossing and domain ownership are mapped and agreed.

    • Policy controls are traced to always-on source logic.

    • Waveform bookmarks align controls with state timestamps.

    Review prompts

    1. Which policy object is first to deviate from intent?

    2. Which owner can apply the smallest reversible fix?

    3. What regression matrix proves no collateral damage?

    4. Which waiver conditions would still block release?

    Evidence capsule

    Diagram
    LP EVIDENCE CAPSULE 4
    
    PATH: low-power/level-shifters-switches/power-switch-architecture
    STATE WINDOW: <from -> to>
    POLICY OBJECT: <isolation / retention / shifter / switch>
    OWNER: <name>
    PRIMARY ARTIFACT: <report/waveform/formal result>
    RELEASE DECISION: <close / bounded waiver / escalate>

    Execution drill pack 5

    Use this pack to rehearse low-power closure on low-power/level-shifters-switches/power-switch-architecture: transition framing, policy ownership, implementation evidence, and release confidence.

    Transition checklist

    • State transition explicitly named with legal source/target states.

    • Crossing and domain ownership are mapped and agreed.

    • Policy controls are traced to always-on source logic.

    • Waveform bookmarks align controls with state timestamps.

    Review prompts

    1. Which policy object is first to deviate from intent?

    2. Which owner can apply the smallest reversible fix?

    3. What regression matrix proves no collateral damage?

    4. Which waiver conditions would still block release?

    Evidence capsule

    Diagram
    LP EVIDENCE CAPSULE 5
    
    PATH: low-power/level-shifters-switches/power-switch-architecture
    STATE WINDOW: <from -> to>
    POLICY OBJECT: <isolation / retention / shifter / switch>
    OWNER: <name>
    PRIMARY ARTIFACT: <report/waveform/formal result>
    RELEASE DECISION: <close / bounded waiver / escalate>

    Execution drill pack 6

    Use this pack to rehearse low-power closure on low-power/level-shifters-switches/power-switch-architecture: transition framing, policy ownership, implementation evidence, and release confidence.

    Transition checklist

    • State transition explicitly named with legal source/target states.

    • Crossing and domain ownership are mapped and agreed.

    • Policy controls are traced to always-on source logic.

    • Waveform bookmarks align controls with state timestamps.

    Review prompts

    1. Which policy object is first to deviate from intent?

    2. Which owner can apply the smallest reversible fix?

    3. What regression matrix proves no collateral damage?

    4. Which waiver conditions would still block release?

    Evidence capsule

    Diagram
    LP EVIDENCE CAPSULE 6
    
    PATH: low-power/level-shifters-switches/power-switch-architecture
    STATE WINDOW: <from -> to>
    POLICY OBJECT: <isolation / retention / shifter / switch>
    OWNER: <name>
    PRIMARY ARTIFACT: <report/waveform/formal result>
    RELEASE DECISION: <close / bounded waiver / escalate>

    Execution drill pack 7

    Use this pack to rehearse low-power closure on low-power/level-shifters-switches/power-switch-architecture: transition framing, policy ownership, implementation evidence, and release confidence.

    Transition checklist

    • State transition explicitly named with legal source/target states.

    • Crossing and domain ownership are mapped and agreed.

    • Policy controls are traced to always-on source logic.

    • Waveform bookmarks align controls with state timestamps.

    Review prompts

    1. Which policy object is first to deviate from intent?

    2. Which owner can apply the smallest reversible fix?

    3. What regression matrix proves no collateral damage?

    4. Which waiver conditions would still block release?

    Evidence capsule

    Diagram
    LP EVIDENCE CAPSULE 7
    
    PATH: low-power/level-shifters-switches/power-switch-architecture
    STATE WINDOW: <from -> to>
    POLICY OBJECT: <isolation / retention / shifter / switch>
    OWNER: <name>
    PRIMARY ARTIFACT: <report/waveform/formal result>
    RELEASE DECISION: <close / bounded waiver / escalate>
    PreviousNext: Power Switch Architecture: Mechanism

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    See also

    • Level Shifter Selection
    • Rush Current Mitigation
    • Always-On Logic