A valid/ready channel works beautifully between neighbouring blocks. Stretch it across a chip with ten pipeline stages each way and something breaks: by the time the receiver's "not ready" reaches the sender, the sender has already sent ten more words, and they are all on their way to a receiver that said it was full.
When the receiver's answer arrives late, how much may the sender send before it hears back?
The obvious answer is to keep valid/ready and register both directions at every stage with skid buffers (lesson 3.9). That works, but each stage needs a spare entry, so a ten-stage path carries ten spare entries spread along it, and each adds latency. The deeper issue is the one skid buffers already showed in miniature: if the sender learns of a stall k cycles late, k extra words are already on their way, and someone must have room for them. Flow control is the general answer to that question: how does a sender know, in advance, that the receiver has room?
Every flow-control scheme in every protocol belongs to one of three families:
Family | How the receiver limits the sender | What the receiver must provide | Examples in this part |
|---|---|---|---|
Stop and go (on/off) | Tells the sender to stop when it is nearly full, and to resume when it has drained | Spare room above the stop threshold for everything that arrives before "stop" takes effect | Lesson 4.2 |
Credits (and windows) | Grants the sender permission in advance, one slot (or byte) at a time; the sender may never send more than it holds | Buffers equal to the credits it grants; credits returned as space frees | Lessons 4.3 to 4.9 |
Rate limits | Agrees a maximum average rate and burst size in advance; no feedback needed while the sender obeys | Enough buffering for the agreed burst; a consumer that keeps up with the agreed rate | Lesson 4.10 |
Notice what all three have in common: the receiver's buffer must cover what can be sent before the receiver's information reaches the sender. They differ in when that information is sent: after the fact (stop), in advance (credits), or once for all time (rates).
With illustrative numbers, a channel between two corners of a large die:
Route: 8 pipeline stages each way to close timing at 2 GHz
Data takes 8 cycles to arrive; feedback takes 8 cycles to return.
If the receiver says "full" now, the sender keeps sending for 8 cycles before it hears,
and the words already in flight keep arriving for 8 more:
up to 16 words arrive after the receiver decides it is full,
so the receiver needs about 16 words of room beyond its "full" point (one round trip).That number, one round trip of data, appears in every scheme of this part. Credits make it explicit (lesson 4.5); stop-and-go hides it in the threshold (lesson 4.2); rate limits hide it in the agreed burst (lesson 4.10).
Family | Strength | Weakness |
|---|---|---|
Stop and go | Simple; little state at the sender | Room above the threshold is wasted most of the time; oscillates under heavy load |
Credits | Exact: the receiver can never overflow; works at any distance | Counters at both ends; buffers sized to the round trip; credit bugs (lesson 4.8) |
Rate limits | No feedback loop at all | Only as good as the agreement; wastes capacity when traffic is lighter than agreed |
Protocol | Family |
|---|---|
PCI Express | Credits: separate credit types for posted, non-posted and completion traffic, each with header and data credits. |
Ethernet | Lossy by default (frames may be dropped), with optional stop-and-go: IEEE 802.3x PAUSE frames, and per-priority PAUSE as priority flow control (802.1Qbb). |
AXI (on chip) | valid/ready on each channel, with register slices for long routes, rather than credits. |
A design extends a valid/ready channel across a chip with simple flip-flops on ready, not skid buffers, because "ready changes rarely" (illustrative). Every time the receiver deasserts ready, the words already sent during the ready delay arrive at a full receiver and are lost. The fix is not more care with ready; it is choosing a scheme whose buffering covers the feedback delay by construction, which for a long path means credits.
About one round trip of words: 5 cycles for "stop" to reach the sender plus 5 cycles of words already in flight, so about 10 words.
Credits: the sender can only send what the receiver has already granted room for.
Both sides agree the rate and burst size in advance; as long as the sender obeys and the receiver is built to keep up, there is nothing to report.
Over a long path the receiver's feedback arrives late, and whatever is sent in the meantime must fit in its buffer.
Flow control comes in three families: stop and go, credits (and windows), and rate limits.
All of them need about one round trip of buffering at full rate; they differ in when the receiver's information is sent.