Read across for one protocol; read down to see how differently the same error is caught and recovered.
PCI Express | Ethernet (+TCP) | AXI | DRAM | DCLink | |
|---|---|---|---|---|---|
Detection on the wire | 32-bit LCRC per TLP per link | CRC-32 per frame | None in the base protocol | ECC on the data bus | CRC-8 per packet |
Correction | FEC from Gen6 (in flits) | Reed-Solomon FEC on 25G+ lanes | — | SECDED (or stronger) | — |
Recovery | ACK/NAK, 12-bit sequence numbers, go-back-N replay, replay timer | Drop bad frames; TCP retransmits end to end | Error responses to the requester | Correct, or report uncorrectable | ACK/NAK, 8-bit sequence, go-back-N (step 9) |
End-to-end check | Optional 32-bit ECRC | TCP checksum | — | ECC travels with the data | — |
Bad data marking | Poisoned TLP (EP bit) | — | — | Poison in caches and fabrics | — |
Error reporting | Correctable, non-fatal, fatal; AER logging | Counters (FCS errors, FEC statistics) | SLVERR, DECERR | Corrected-error counters, machine checks | CPL status ERR |
Degradation | Retrain, lower speed or width | Re-establish link | — | Spare rows, page retirement (system) | — |
Fast serial links detect per link and replay locally; FEC joins when the raw error rate rises.
On-chip buses mostly report rather than recover: errors are rare and the requester decides.
Storage corrects in place, because it has no sender to ask.
End-to-end checks and poison close the gaps that per-link checks leave inside devices.