Hardware / software view

Block architecture choices must align with top-level contracts early.

What firmware teams feel

• Boot instability

• Contract drift after minor RTL change

Contract impact

• Register defaults

• interrupt behavior

• clock/reset assumptions

Build and integration notes

• Synth/PD assumptions can invalidate software expectations

Mitigations

• Versioned contracts

• joint hw/sw readiness reviews

HW/SW CONTRACT — Block Budget Contracts
// firmware init order must match reset/clock release assumptions

Layer software touches

SOC INTEGRATION LAYERS — Block Budget Contracts

layer               owns                          failure mode
-----------------   ---------------------------   ------------------------
architecture        partition + contracts         impossible budgets
ip handoff          models + collateral           integration mismatch
fabric/clock/reset  global behavior               domain deadlock
physical/package    route + SI/PI + IO            late closure churn
signoff process     manifests + waivers           non-reproducible claims
program governance  owners + escalations          schedule collapse

SoC deep dive

Budget and ownership contracts are technical artifacts, not PM slides.

Concept diagram

HIERARCHY CONTRACT FLOW
partition -> block budget -> owner signoff -> integration checkpoint

Metric graph

BUDGET RISK TREND
open risks ████████
owned fixes ███████
unowned risks ██

Reports and artifacts

• budget delta dashboard

• ownership matrix

• milestone health report

• risk register

Mini case study

A timing overrun was solved only after budget ownership moved from shared to single-threaded.

Debug branches

• Validate contract revision

• Check owner signatures

• Audit milestone readiness

Senior review question

Ask: what baseline, owner, and artifact prove this topic is truly closed?

Key takeaways

• State baseline manifest and owner with every closure metric.

• Run cross-domain regression after every top-level fix.

Common pitfalls

• Comparing results across different manifests.

• Unowned issues slipping through review cycles.

• Waiving risks without expiry and validation plan.

Principal SoC review addendum

Chip closure starts with explicit budget contracts per block; integration fails when local optimizations violate global top-level constraints.

Metric: timing/power/area budget adherence at tape-in gates