SystemVerilog OOP Mastery · All levels
No Multiple Inheritance: Interface Classes + Composition: Pitfalls
Pitfalls for No Multiple Inheritance: Interface Classes + Composition.
Pitfalls and red flags
Attempting to `extend` two classes directly; SystemVerilog allows only one base class.
Copy-pasting helper logic into every class instead of delegating to a composed object.
Not documenting ownership/lifetime of composed helper objects, causing null-handle runtime errors.
Using deep inheritance chains to fake multiple inheritance, which couples unrelated responsibilities.