SystemVerilog OOP Mastery · All levels

OOP Patterns & UVM Application: Tricky Q&A

Rapid-fire interview Q&A for OOP Patterns & UVM Application.

Section Q&A

Rapid-fire interview questions for OOP Patterns & UVM Application. Answer out loud, then check yourself.

Q1. If both type override and instance override could match, what does factory resolution pick?

Answer: The matching instance override takes precedence because it is path-specific; factory falls back to type override only when no instance mapping applies.

Trap: Assuming whichever override was called last always wins regardless of path specificity.

Q2. When should you choose callbacks instead of policy classes?

Answer: Choose callbacks for hook-based interception around component lifecycle events; choose policy classes for core algorithm selection that should be explicit and easily testable.

Trap: Treating callbacks as a drop-in replacement for all algorithm variability concerns.

Q3. Why do overrides on parameterized components often fail silently in large benches?

Answer: Because teams override a different specialization than the instantiated one. `generic_driver#(axi_item)` and `generic_driver#(uvm_sequence_item)` are distinct factory types.

Trap: Believing one override on a generic base specialization applies transitively to all parameter values.

Q4. How do singleton and config_db complement each other in UVM?

Answer: Singleton can own one run-wide identity, while config_db provides explicit, hierarchical dependency injection and scoped overrides to consumers.

Trap: Using singleton reads everywhere and skipping config_db wiring, which hides dependencies and weakens test control.