SystemVerilog OOP Mastery · All levels
Singleton and config_db Patterns without Global Chaos: Exercises
Exercises for Singleton and config_db Patterns without Global Chaos.
Practice exercises
Exercise 1
You need one global timeout object, but different sub-envs may override only coverage enable. How do you structure this?
Solution
diagram
Keep singleton for canonical defaults, then set cloned or adjusted handles into specific config_db scopes so sub-env overrides remain explicit and local.Exercise 2
A monitor reads singleton directly and ignores test config_db settings. Why is this risky and what is fix?
Solution
diagram
It bypasses hierarchical control and surprises tests. Fetch dependency through `uvm_config_db` in build phase and reserve direct singleton access for ownership/setup code only.