SystemVerilog OOP Mastery · All levels
No Multiple Inheritance (Only Interface-Class Contracts): Code Examples
Code Examples for No Multiple Inheritance (Only Interface-Class Contracts).
Code examples
Capability mix: C++ multiple bases vs SV contracts + helpers
systemverilog
// C++: multiple inheritance of implementation
class Logger {
public:
void log(const std::string& msg) { /* write log */ }
};
class Serializer {
public:
std::string serialize() const { return "{}"; }
};
class Packet : public Logger, public Serializer {
public:
int id;
};
// SystemVerilog: one extends chain + interface classes + composition
interface class loggable_if;
pure virtual function void log(string msg);
endclass
interface class serializable_if;
pure virtual function string serialize();
endclass
class logger_helper;
function void write(string who, string msg);
$display("[%0s] %0s", who, msg);
endfunction
endclass
class packet extends uvm_sequence_item implements loggable_if, serializable_if;
int id;
logger_helper logger;
function new(string name = "packet");
super.new(name);
logger = new();
endfunction
virtual function void log(string msg);
logger.write(get_name(), msg);
endfunction
virtual function string serialize();
return $sformatf("{id:%0d}", id);
endfunction
endclassThe C++ class inherits concrete methods from two bases. The SV class cannot do that, so it advertises contracts with interface classes and delegates reusable behavior to helper objects.
Behavior sharing: Java interfaces/default methods vs SV explicit delegation
systemverilog
// Java: one class inheritance + multiple interfaces with defaults
interface Auditable {
default void audit(String m) { System.out.println("AUDIT " + m); }
}
interface JsonRenderable {
String toJson();
}
class Event extends BaseEvent implements Auditable, JsonRenderable {
int id;
public String toJson() { return "{\"id\":" + id + "}"; }
}
// SystemVerilog: interfaces define contract only; helper owns implementation
interface class auditable_if;
pure virtual function void audit(string m);
endclass
class audit_helper;
function void do_audit(string m);
$display("AUDIT %0s", m);
endfunction
endclass
class event extends base_event implements auditable_if;
int id;
audit_helper ah;
function new(string name = "event");
super.new(name);
ah = new();
endfunction
virtual function void audit(string m);
ah.do_audit(m);
endfunction
function string to_json();
return $sformatf("{\"id\":%0d}", id);
endfunction
endclassJava can place some behavior in default interface methods. SystemVerilog interface classes do not carry implementation, so behavior reuse always comes from composed helper classes or utility functions.