SystemVerilog OOP Mastery · All levels
Object Lifetime and Null Handles: Exercises
Exercises for Object Lifetime and Null Handles.
Practice exercises
Exercise 1
Given a monitor that calls cfg.format() every sample, where cfg is assigned in connect_phase only when has_agent is true, identify the ownership bug and propose one robust fix.
Solution
diagram
The monitor assumes cfg always exists but connect_phase conditionally skips assignment. Fix by allocating cfg in constructor or by requiring cfg injection and asserting non-null in build/connect before sampling.Exercise 2
You see null dereference in scoreboard.compare(), but packet creation happens in sequence body. What two instrumentation points localize the bug fastest?
Solution
diagram
Instrument packet construction with sequence path and ID, then assert/log non-null at every handoff (sequence->driver, driver->monitor, monitor->scoreboard). The first missing handoff pinpoints the ownership gap.