AI for VLSI · All levels
Dataflow Mapping Strategies: Theory Deep Dive
Theory Deep Dive for Dataflow Mapping Strategies.
Foundational theory
Dataflow Mapping Strategies anchors Accelerator Architecture. Weight-stationary, output-stationary, and row-stationary mappings trade local reuse against bandwidth and scheduling complexity. Senior engineers connect model behavior to workload constraints, architecture implications, and ownership boundaries.
Core concepts explained
Weight-stationary, output-stationary, and row-stationary mappings trade local reuse against bandwidth and scheduling complexity.
Primary metric: weight/input/output reuse factor, buffer hit rate, and latency
Primary artifact: dataflow comparison matrix, mapping trace, and reuse analysis
Owners: compiler engineer, architecture owner, performance analyst
Data, model, and hardware assumptions must be explicit
Evidence must map model behavior to engineering decisions
Why this matters in product delivery
At tapeout and product scale, Dataflow Mapping Strategies failures become expensive schedule and quality risks. Data movement is often the dominant bottleneck in accelerator efficiency.
Mental model
DATAFLOW STRATEGIES
weight-stationary : keeps weights local
output-stationary : keeps partial sums local
row-stationary : balances multi-dimensional reuseWorked intuition
Name the engineering decision this model or mechanism supports.
Open weight/input/output reuse factor, buffer hit rate, and latency and identify the first weak signal.
Check data quality, model assumptions, and compute mapping.
Separate algorithm issue from runtime/hardware bottleneck.
Collect dataflow comparison matrix, mapping trace, and reuse analysis with reproducible revision tags.
Apply minimal change with bounded blast radius.
Re-run validation and deployment readiness checks.
Common misconceptions
Higher model complexity always means better product outcomes.
Benchmark wins directly imply EDA/silicon workflow value.
Quantization is free if average accuracy is unchanged.
One successful run is enough for production confidence.
Visual reinforcement
Dataflow options
DATAFLOW STRATEGIES
weight-stationary : keeps weights local
output-stationary : keeps partial sums local
row-stationary : balances multi-dimensional reuseLayer responsibilities
AI-VLSI OWNERSHIP LAYERS — Dataflow Mapping Strategies
layer owns typical failure
--------------------- -------------------------------- ----------------------------
problem framing metric + acceptance criteria wrong objective target
model + training representation + optimization unstable or biased model
hardware mapping dataflow + memory + precision bandwidth stalls / mismatch
deployment stack runtime + firmware + drivers latency jitter / incompatibility
governance monitoring + rollback + signoff silent drift in productionAI-VLSI deep dive
Dataflow and memory hierarchy choices dominate practical accelerator performance.
Concept diagram
ACCELERATOR STACK
MAC array -> dataflow map -> SRAM hierarchy -> NoC/DRAMMetric graph
BOTTLENECK MIX
array underutilization ████
SRAM pressure ███████
NoC/DRAM congestion ██████Reports and artifacts
array utilization
reuse factor report
buffer hit analysis
NoC/DRAM bottleneck trace
Mini case study
A dataflow change improved reuse but exposed NoC congestion, requiring route-policy updates.
Debug branches
Map reuse factors
Inspect memory stall sources
Profile NoC arbitration
Senior review question
Ask: what evidence connects this ML claim to a concrete VLSI workflow decision and owner signoff?
Key takeaways
Every AI claim should map to a measurable engineering outcome.
Validate both model quality and hardware/runtime feasibility before adoption.
Common pitfalls
Optimizing benchmark metrics that do not correlate with signoff goals.
Ignoring data drift and calibration after deployment.
Shipping ML workflows without clear rollback ownership.
Execution drill pack 1
Use this pack to rehearse AI-for-VLSI decision making on ai-vlsi/accelerator-architecture/dataflow-mapping-strategies/theory-deep-dive: metric framing, mechanism proof, hardware implications, and release safety.
Evidence checklist
Metric context includes workload, dataset slice, and revision tags.
Mechanism explanation links model behavior to observed outcome.
Hardware/runtime feasibility is profiled, not assumed.
Owner and rollback path are documented before rollout.
Review prompts
Which decision will this model output influence?
What is the first failing layer when metric regresses?
Which owner applies the smallest reversible fix?
What validation matrix is required before deployment?
Evidence capsule
AI-VLSI EVIDENCE CAPSULE 1
PATH: ai-vlsi/accelerator-architecture/dataflow-mapping-strategies/theory-deep-dive
WORKLOAD SLICE: <name>
PRIMARY METRIC: <value/trend>
FIRST FAILING LAYER: <data/model/runtime/hardware>
OWNER: <name>
PRIMARY ARTIFACT: <report/profile/dashboard>
DECISION: <ship / rollback / escalate>Execution drill pack 2
Use this pack to rehearse AI-for-VLSI decision making on ai-vlsi/accelerator-architecture/dataflow-mapping-strategies/theory-deep-dive: metric framing, mechanism proof, hardware implications, and release safety.
Evidence checklist
Metric context includes workload, dataset slice, and revision tags.
Mechanism explanation links model behavior to observed outcome.
Hardware/runtime feasibility is profiled, not assumed.
Owner and rollback path are documented before rollout.
Review prompts
Which decision will this model output influence?
What is the first failing layer when metric regresses?
Which owner applies the smallest reversible fix?
What validation matrix is required before deployment?
Evidence capsule
AI-VLSI EVIDENCE CAPSULE 2
PATH: ai-vlsi/accelerator-architecture/dataflow-mapping-strategies/theory-deep-dive
WORKLOAD SLICE: <name>
PRIMARY METRIC: <value/trend>
FIRST FAILING LAYER: <data/model/runtime/hardware>
OWNER: <name>
PRIMARY ARTIFACT: <report/profile/dashboard>
DECISION: <ship / rollback / escalate>Execution drill pack 3
Use this pack to rehearse AI-for-VLSI decision making on ai-vlsi/accelerator-architecture/dataflow-mapping-strategies/theory-deep-dive: metric framing, mechanism proof, hardware implications, and release safety.
Evidence checklist
Metric context includes workload, dataset slice, and revision tags.
Mechanism explanation links model behavior to observed outcome.
Hardware/runtime feasibility is profiled, not assumed.
Owner and rollback path are documented before rollout.
Review prompts
Which decision will this model output influence?
What is the first failing layer when metric regresses?
Which owner applies the smallest reversible fix?
What validation matrix is required before deployment?
Evidence capsule
AI-VLSI EVIDENCE CAPSULE 3
PATH: ai-vlsi/accelerator-architecture/dataflow-mapping-strategies/theory-deep-dive
WORKLOAD SLICE: <name>
PRIMARY METRIC: <value/trend>
FIRST FAILING LAYER: <data/model/runtime/hardware>
OWNER: <name>
PRIMARY ARTIFACT: <report/profile/dashboard>
DECISION: <ship / rollback / escalate>Execution drill pack 4
Use this pack to rehearse AI-for-VLSI decision making on ai-vlsi/accelerator-architecture/dataflow-mapping-strategies/theory-deep-dive: metric framing, mechanism proof, hardware implications, and release safety.
Evidence checklist
Metric context includes workload, dataset slice, and revision tags.
Mechanism explanation links model behavior to observed outcome.
Hardware/runtime feasibility is profiled, not assumed.
Owner and rollback path are documented before rollout.
Review prompts
Which decision will this model output influence?
What is the first failing layer when metric regresses?
Which owner applies the smallest reversible fix?
What validation matrix is required before deployment?
Evidence capsule
AI-VLSI EVIDENCE CAPSULE 4
PATH: ai-vlsi/accelerator-architecture/dataflow-mapping-strategies/theory-deep-dive
WORKLOAD SLICE: <name>
PRIMARY METRIC: <value/trend>
FIRST FAILING LAYER: <data/model/runtime/hardware>
OWNER: <name>
PRIMARY ARTIFACT: <report/profile/dashboard>
DECISION: <ship / rollback / escalate>Execution drill pack 5
Use this pack to rehearse AI-for-VLSI decision making on ai-vlsi/accelerator-architecture/dataflow-mapping-strategies/theory-deep-dive: metric framing, mechanism proof, hardware implications, and release safety.
Evidence checklist
Metric context includes workload, dataset slice, and revision tags.
Mechanism explanation links model behavior to observed outcome.
Hardware/runtime feasibility is profiled, not assumed.
Owner and rollback path are documented before rollout.
Review prompts
Which decision will this model output influence?
What is the first failing layer when metric regresses?
Which owner applies the smallest reversible fix?
What validation matrix is required before deployment?
Evidence capsule
AI-VLSI EVIDENCE CAPSULE 5
PATH: ai-vlsi/accelerator-architecture/dataflow-mapping-strategies/theory-deep-dive
WORKLOAD SLICE: <name>
PRIMARY METRIC: <value/trend>
FIRST FAILING LAYER: <data/model/runtime/hardware>
OWNER: <name>
PRIMARY ARTIFACT: <report/profile/dashboard>
DECISION: <ship / rollback / escalate>Execution drill pack 6
Use this pack to rehearse AI-for-VLSI decision making on ai-vlsi/accelerator-architecture/dataflow-mapping-strategies/theory-deep-dive: metric framing, mechanism proof, hardware implications, and release safety.
Evidence checklist
Metric context includes workload, dataset slice, and revision tags.
Mechanism explanation links model behavior to observed outcome.
Hardware/runtime feasibility is profiled, not assumed.
Owner and rollback path are documented before rollout.
Review prompts
Which decision will this model output influence?
What is the first failing layer when metric regresses?
Which owner applies the smallest reversible fix?
What validation matrix is required before deployment?
Evidence capsule
AI-VLSI EVIDENCE CAPSULE 6
PATH: ai-vlsi/accelerator-architecture/dataflow-mapping-strategies/theory-deep-dive
WORKLOAD SLICE: <name>
PRIMARY METRIC: <value/trend>
FIRST FAILING LAYER: <data/model/runtime/hardware>
OWNER: <name>
PRIMARY ARTIFACT: <report/profile/dashboard>
DECISION: <ship / rollback / escalate>Execution drill pack 7
Use this pack to rehearse AI-for-VLSI decision making on ai-vlsi/accelerator-architecture/dataflow-mapping-strategies/theory-deep-dive: metric framing, mechanism proof, hardware implications, and release safety.
Evidence checklist
Metric context includes workload, dataset slice, and revision tags.
Mechanism explanation links model behavior to observed outcome.
Hardware/runtime feasibility is profiled, not assumed.
Owner and rollback path are documented before rollout.
Review prompts
Which decision will this model output influence?
What is the first failing layer when metric regresses?
Which owner applies the smallest reversible fix?
What validation matrix is required before deployment?
Evidence capsule
AI-VLSI EVIDENCE CAPSULE 7
PATH: ai-vlsi/accelerator-architecture/dataflow-mapping-strategies/theory-deep-dive
WORKLOAD SLICE: <name>
PRIMARY METRIC: <value/trend>
FIRST FAILING LAYER: <data/model/runtime/hardware>
OWNER: <name>
PRIMARY ARTIFACT: <report/profile/dashboard>
DECISION: <ship / rollback / escalate>Execution drill pack 8
Use this pack to rehearse AI-for-VLSI decision making on ai-vlsi/accelerator-architecture/dataflow-mapping-strategies/theory-deep-dive: metric framing, mechanism proof, hardware implications, and release safety.
Evidence checklist
Metric context includes workload, dataset slice, and revision tags.
Mechanism explanation links model behavior to observed outcome.
Hardware/runtime feasibility is profiled, not assumed.
Owner and rollback path are documented before rollout.
Review prompts
Which decision will this model output influence?
What is the first failing layer when metric regresses?
Which owner applies the smallest reversible fix?
What validation matrix is required before deployment?
Evidence capsule
AI-VLSI EVIDENCE CAPSULE 8
PATH: ai-vlsi/accelerator-architecture/dataflow-mapping-strategies/theory-deep-dive
WORKLOAD SLICE: <name>
PRIMARY METRIC: <value/trend>
FIRST FAILING LAYER: <data/model/runtime/hardware>
OWNER: <name>
PRIMARY ARTIFACT: <report/profile/dashboard>
DECISION: <ship / rollback / escalate>Execution drill pack 9
Use this pack to rehearse AI-for-VLSI decision making on ai-vlsi/accelerator-architecture/dataflow-mapping-strategies/theory-deep-dive: metric framing, mechanism proof, hardware implications, and release safety.
Evidence checklist
Metric context includes workload, dataset slice, and revision tags.
Mechanism explanation links model behavior to observed outcome.
Hardware/runtime feasibility is profiled, not assumed.
Owner and rollback path are documented before rollout.
Review prompts
Which decision will this model output influence?
What is the first failing layer when metric regresses?
Which owner applies the smallest reversible fix?
What validation matrix is required before deployment?
Evidence capsule
AI-VLSI EVIDENCE CAPSULE 9
PATH: ai-vlsi/accelerator-architecture/dataflow-mapping-strategies/theory-deep-dive
WORKLOAD SLICE: <name>
PRIMARY METRIC: <value/trend>
FIRST FAILING LAYER: <data/model/runtime/hardware>
OWNER: <name>
PRIMARY ARTIFACT: <report/profile/dashboard>
DECISION: <ship / rollback / escalate>Execution drill pack 10
Use this pack to rehearse AI-for-VLSI decision making on ai-vlsi/accelerator-architecture/dataflow-mapping-strategies/theory-deep-dive: metric framing, mechanism proof, hardware implications, and release safety.
Evidence checklist
Metric context includes workload, dataset slice, and revision tags.
Mechanism explanation links model behavior to observed outcome.
Hardware/runtime feasibility is profiled, not assumed.
Owner and rollback path are documented before rollout.
Review prompts
Which decision will this model output influence?
What is the first failing layer when metric regresses?
Which owner applies the smallest reversible fix?
What validation matrix is required before deployment?
Evidence capsule
AI-VLSI EVIDENCE CAPSULE 10
PATH: ai-vlsi/accelerator-architecture/dataflow-mapping-strategies/theory-deep-dive
WORKLOAD SLICE: <name>
PRIMARY METRIC: <value/trend>
FIRST FAILING LAYER: <data/model/runtime/hardware>
OWNER: <name>
PRIMARY ARTIFACT: <report/profile/dashboard>
DECISION: <ship / rollback / escalate>Execution drill pack 11
Use this pack to rehearse AI-for-VLSI decision making on ai-vlsi/accelerator-architecture/dataflow-mapping-strategies/theory-deep-dive: metric framing, mechanism proof, hardware implications, and release safety.
Evidence checklist
Metric context includes workload, dataset slice, and revision tags.
Mechanism explanation links model behavior to observed outcome.
Hardware/runtime feasibility is profiled, not assumed.
Owner and rollback path are documented before rollout.
Review prompts
Which decision will this model output influence?
What is the first failing layer when metric regresses?
Which owner applies the smallest reversible fix?
What validation matrix is required before deployment?
Evidence capsule
AI-VLSI EVIDENCE CAPSULE 11
PATH: ai-vlsi/accelerator-architecture/dataflow-mapping-strategies/theory-deep-dive
WORKLOAD SLICE: <name>
PRIMARY METRIC: <value/trend>
FIRST FAILING LAYER: <data/model/runtime/hardware>
OWNER: <name>
PRIMARY ARTIFACT: <report/profile/dashboard>
DECISION: <ship / rollback / escalate>Execution drill pack 12
Use this pack to rehearse AI-for-VLSI decision making on ai-vlsi/accelerator-architecture/dataflow-mapping-strategies/theory-deep-dive: metric framing, mechanism proof, hardware implications, and release safety.
Evidence checklist
Metric context includes workload, dataset slice, and revision tags.
Mechanism explanation links model behavior to observed outcome.
Hardware/runtime feasibility is profiled, not assumed.
Owner and rollback path are documented before rollout.
Review prompts
Which decision will this model output influence?
What is the first failing layer when metric regresses?
Which owner applies the smallest reversible fix?
What validation matrix is required before deployment?
Evidence capsule
AI-VLSI EVIDENCE CAPSULE 12
PATH: ai-vlsi/accelerator-architecture/dataflow-mapping-strategies/theory-deep-dive
WORKLOAD SLICE: <name>
PRIMARY METRIC: <value/trend>
FIRST FAILING LAYER: <data/model/runtime/hardware>
OWNER: <name>
PRIMARY ARTIFACT: <report/profile/dashboard>
DECISION: <ship / rollback / escalate>Execution drill pack 13
Use this pack to rehearse AI-for-VLSI decision making on ai-vlsi/accelerator-architecture/dataflow-mapping-strategies/theory-deep-dive: metric framing, mechanism proof, hardware implications, and release safety.
Evidence checklist
Metric context includes workload, dataset slice, and revision tags.
Mechanism explanation links model behavior to observed outcome.
Hardware/runtime feasibility is profiled, not assumed.
Owner and rollback path are documented before rollout.
Review prompts
Which decision will this model output influence?
What is the first failing layer when metric regresses?
Which owner applies the smallest reversible fix?
What validation matrix is required before deployment?
Evidence capsule
AI-VLSI EVIDENCE CAPSULE 13
PATH: ai-vlsi/accelerator-architecture/dataflow-mapping-strategies/theory-deep-dive
WORKLOAD SLICE: <name>
PRIMARY METRIC: <value/trend>
FIRST FAILING LAYER: <data/model/runtime/hardware>
OWNER: <name>
PRIMARY ARTIFACT: <report/profile/dashboard>
DECISION: <ship / rollback / escalate>Theory reinforcement
Data movement is often the dominant bottleneck in accelerator efficiency.