Foundational theory

Analog Supply Noise is central to Noise & IR at the Boundary. Switching current bursts from digital domains couple through shared impedance and package parasitics, modulating analog supply quality and phase noise. Senior AMS owners always tie observed failure to boundary assumptions, ownership, and measurable evidence before changing RTL or layout.

Core concepts explained

• Switching current bursts from digital domains couple through shared impedance and package parasitics, modulating analog supply quality and phase noise.

• Primary metric: supply ripple, spur coupling, analog performance degradation

• Primary artifact: supply noise simulation, ripple spectrum, decap strategy report

• Owners: PI owner, analog lead, package owner

• Boundary and mode context are mandatory for any claim.

• Treat lock/ready/valid bits as evidence, not proof of health.

Why this matters at signoff

At tapeout and bring-up, Analog Supply Noise escapes are expensive to fix. Boundary signoff must combine timing, noise, IR, and package evidence. Wrong diagnosis burns schedule across analog, digital, and package teams.

Mental model

digital burst current -> shared impedance -> analog ripple/spurs -> performance loss

Worked intuition

1. Name boundary and product mode where failure appears.

2. Open supply ripple, spur coupling, analog performance degradation and identify worst scenario.

3. Trace clocks/resets/config from analog macro to digital consumer.

4. Verify wrapper and handoff assumptions on the failing path.

5. Collect supply noise simulation, ripple spectrum, decap strategy report and freeze evidence tags.

6. Classify root cause: contract gap, physical coupling, sequencing bug, or tool-view mismatch.

7. Propose minimal bounded change plus cross-domain regression.

Common misconceptions

• Lock high means clock quality is automatically good.

• Boundary cells are one-time checklist items, not runtime risks.

• SerDes training failure is always firmware.

• If average metric is healthy, there is no silicon risk.

Visual reinforcement

Supply noise path

digital burst current -> shared impedance -> analog ripple/spurs -> performance loss

Layer responsibilities

AMS OWNERSHIP LAYERS — Analog Supply Noise

layer                owns                                failure mode
------------------   ----------------------------------  --------------------------
spec contract         clocks/resets/interfaces            hidden assumption drift
wrapper logic         synchronizers/framing/flags         silent data corruption
physical integration  floorplan/isolation/power           coupled noise and droop
signoff governance    waivers/checklists/dashboard        release with blind spots
closure               debug order + regression            fix regresses another mode

AMS deep dive

AMS signoff is a combined noise, IR, timing, and package decision.

Concept diagram

BOUNDARY SIGNOFF

noise + IR + package + timing -> release decision

Metric graph

RISK DASHBOARD

open blockers █████
waivers       ███

Reports and artifacts

• supply ripple spectrum

• IR around analog islands

• package PI summary

• release dashboard

Mini case study

IR hotspot at analog island caused jitter spikes only under burst traffic.

Debug branches

• Correlate droop and jitter

• Check package return path

• Validate mode-specific activity profile

Senior review question

Ask: what boundary condition proves this topic is actually closed?

Key takeaways

• State boundary, mode, and evidence tag with every claim.

• Always align analog, digital, and physical owners before signoff decisions.

Common pitfalls

• Fixing averages while tails still fail.

• Skipping package/supply evidence in jitter or SerDes issues.

• Shipping with waivers that lack owner and expiration criteria.

Theory reinforcement

Boundary signoff must combine timing, noise, IR, and package evidence.