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Course contents

  • Start Here6
  • SystemVerilog Language Foundations28
  • Object-Oriented SystemVerilog for Verification30
  • Constraint Randomization — Interview-Critical Deep Dive36
  • SystemVerilog Assertions — Interview-Critical Deep Dive40
  • Functional Coverage in SystemVerilog22
  • Testbench Architecture in SystemVerilog23
  • Advanced Language & Integration25
  • Senior & Interview Preparation21
  • Principal-Level Verification28
    • Reusable Testbench Architecture
    • Checking Out-of-Order Traffic
    • Assertion Depth
    • Coverage Modelling for Real Features
      • Transaction and Temporal Coverage
      • Coverage Filters
      • Assertion-Backed Coverage
      • Closure at Scale
    • Capstone: Out-of-Order Memory Controller
    • Principal Judgment
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‹Principal-Level Verification
  1. Topics
  2. SystemVerilog
  3. Principal-Level Verification
  4. Coverage Modelling for Real Features

Part 9 · Principal-Level Verification · Advanced

Coverage Modelling for Real Features

Coverage of transactions and derived state, filtered crosses, assertion-backed covers and closure across many seeds.

  • 4topics
  • 4lessons

A coverage model is only as good as the questions it asks. Bins on raw signals are easy to fill and say little. This topic models the things that cause bugs: how deep the outstanding table was, how soon an ID came back, which legal combinations ran, and which multi-cycle scenarios happened.

Every lesson has a runnable bench. The free simulators here cannot collect covergroups, so each bench checks a procedural mirror of the bins against a hand count, and the page says so. The covergroup code is shown next to it for a commercial tool.

Diagram
WHAT A REAL-FEATURE COVERAGE MODEL MEASURES

  pins ──► monitor ──► transactions ──► derived state ──► covergroup
                            │            (depth, reuse        (bins, filtered
                            │             distance, latency)    crosses)
                            └──► sequences on the pins ──► cover property
                                                              (temporal rows)
  per test:  coverage database
  per regression:  merge ──► rank ──► holes ──► stop or spend more seeds

Lesson

What it covers

Transaction and Temporal Coverage

Sample transactions, not signals. Cover derived state such as outstanding depth and ID reuse distance.

Coverage Filters

with on bins and crosses, the matches policy, cross functions, and a filtered cross checked against a hand count.

Assertion-Backed Coverage

cover property for temporal plan rows, hit counts read back and checked, and a planted hole.

Closure at Scale

Merging, greedy test ranking, seed budgets from hit probabilities, and when to stop.

Check yourself A covergroup on req_id with four bins reaches 100% in the first test. Why does that tell you almost nothing about an out-of-order controller?

Any test that issues four IDs fills it. The bugs live in how IDs interact: how many were outstanding, how soon an ID was reused after its response, and what the response order was. Those are derived quantities, and the bins must be on them.

Interview

Principal-level coverage questions are about model design, not syntax: what would you sample and when, which crosses are legal, how you tie temporal scenarios to the plan, and how many seeds you need before a rare bin is a hole rather than bad luck.

Related topics

  • Part 9: Principal-Level Verification

  • Part 5: Functional Coverage

  • Coverage Closure

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See also

  • Reusable Testbench Architecture
  • Checking Out-of-Order Traffic
  • Assertion Depth