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Course contents

  • How to Use This Course
  • AI-VLSI Metrics Reference
  • AI-VLSI Glossary
  • Reading Path
  • ML Math Foundations61
  • Neural Networks Basics61
  • Training Data Pipeline61
  • AI Compute Hardware61
    • CPU, GPU, TPU, NPU Landscape
    • Memory Bandwidth & Roofline
      • Memory Bandwidth & Roofline: Mechanism
      • Memory Bandwidth & Roofline: Inputs & Outputs
      • Memory Bandwidth & Roofline: Reports & Metrics
      • Memory Bandwidth & Roofline: Debug Playbook
      • Memory Bandwidth & Roofline: Worked Example
      • Memory Bandwidth & Roofline: Pitfalls & Red Flags
      • Memory Bandwidth & Roofline: Interview Drills
      • Memory Bandwidth & Roofline: Review Checklist
      • Memory Bandwidth & Roofline: Theory Deep Dive
      • Memory Bandwidth & Roofline: Design Space
      • Memory Bandwidth & Roofline: Expanded Case Study
      • Memory Bandwidth & Roofline: Step-by-Step Walkthrough
      • Memory Bandwidth & Roofline: Comparison Matrix
      • Memory Bandwidth & Roofline: Software / Programmer View
      • Memory Bandwidth & Roofline: Silicon PPA Impact
    • Precision & Quantization
    • Inference vs Training Silicon
    • AI Compute Hardware: Tricky Q&A
  • Accelerator Architecture61
  • AI in VLSI Workflows61
  • Edge Deployment & MLOps61
  • AI-VLSI Interview Prep4
  • AI Basics for VLSI Engineers Cheatsheet
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‹Memory Bandwidth & Roofline
  1. Topics
  2. AI for VLSI
  3. AI Compute Hardware
  4. Memory Bandwidth & Roofline
  5. Memory Bandwidth & Roofline: Design Space

AI for VLSI · All levels

Memory Bandwidth & Roofline: Design Space

Design Space for Memory Bandwidth & Roofline.

On this page

    Design space exploration

    For Memory Bandwidth & Roofline, tradeoffs are accuracy, latency, power, and workflow risk.

    Option A — conservative

    • Conservative baseline: helps predictable operation

    • Risk: lower peak performance

    • Validate with: first deployment

    Option B — balanced

    • Balanced optimization: helps good efficiency

    • Risk: needs tuning discipline

    • Validate with: mainline production

    Option C — aggressive optimization

    • Aggressive optimization: helps best resource use

    • Risk: higher fragility

    • Validate with: mature pipelines

    Option D — architecture refactor

    • Architecture refactor: helps long-term scalability

    • Risk: schedule risk

    • Validate with: repeated bottlenecks

    Diagram
    DESIGN SPACE — Memory Bandwidth & Roofline
    accuracy <-> latency <-> power <-> engineering risk

    Design pitfalls

    • Optimizing one KPI without system-level impact

    • Skipping fallback plan for low-confidence regions

    Tradeoff curve

    Diagram
    BEFORE / AFTER — Memory Bandwidth & Roofline
    
    metric quality
      ^
      |                        o target region
      |                 o post-fix + regression
      |            o
      |      o baseline failing run
      +-----------------------------------------> iteration
          evidence audit   fix    full validation

    AI-VLSI deep dive

    Throughput claims are meaningless without roofline and bandwidth context.

    Concept diagram

    Diagram
    COMPUTE ANALYSIS
    
    workload profile -> roofline -> precision policy -> target silicon

    Metric graph

    Diagram
    EFFICIENCY DRIVERS
    
    compute utilization    ██████
    memory utilization     █████████
    precision efficiency   ███████

    Reports and artifacts

    • platform benchmark matrix

    • roofline chart

    • precision sweep

    • latency/power dashboard

    Mini case study

    Kernel optimization shifted from compute tuning to memory tiling after roofline analysis.

    Debug branches

    • Classify compute vs memory bound

    • Compare precision tiers

    • Align platform to SLA

    Senior review question

    Ask: what evidence connects this ML claim to a concrete VLSI workflow decision and owner signoff?

    Key takeaways

    • Every AI claim should map to a measurable engineering outcome.

    • Validate both model quality and hardware/runtime feasibility before adoption.

    Common pitfalls

    • Optimizing benchmark metrics that do not correlate with signoff goals.

    • Ignoring data drift and calibration after deployment.

    • Shipping ML workflows without clear rollback ownership.

    Execution drill pack 1

    Use this pack to rehearse AI-for-VLSI decision making on ai-vlsi/ai-compute-hardware/memory-bandwidth-and-roofline/design-space: metric framing, mechanism proof, hardware implications, and release safety.

    Evidence checklist

    • Metric context includes workload, dataset slice, and revision tags.

    • Mechanism explanation links model behavior to observed outcome.

    • Hardware/runtime feasibility is profiled, not assumed.

    • Owner and rollback path are documented before rollout.

    Review prompts

    1. Which decision will this model output influence?

    2. What is the first failing layer when metric regresses?

    3. Which owner applies the smallest reversible fix?

    4. What validation matrix is required before deployment?

    Evidence capsule

    Diagram
    AI-VLSI EVIDENCE CAPSULE 1
    
    PATH: ai-vlsi/ai-compute-hardware/memory-bandwidth-and-roofline/design-space
    WORKLOAD SLICE: <name>
    PRIMARY METRIC: <value/trend>
    FIRST FAILING LAYER: <data/model/runtime/hardware>
    OWNER: <name>
    PRIMARY ARTIFACT: <report/profile/dashboard>
    DECISION: <ship / rollback / escalate>

    Execution drill pack 2

    Use this pack to rehearse AI-for-VLSI decision making on ai-vlsi/ai-compute-hardware/memory-bandwidth-and-roofline/design-space: metric framing, mechanism proof, hardware implications, and release safety.

    Evidence checklist

    • Metric context includes workload, dataset slice, and revision tags.

    • Mechanism explanation links model behavior to observed outcome.

    • Hardware/runtime feasibility is profiled, not assumed.

    • Owner and rollback path are documented before rollout.

    Review prompts

    1. Which decision will this model output influence?

    2. What is the first failing layer when metric regresses?

    3. Which owner applies the smallest reversible fix?

    4. What validation matrix is required before deployment?

    Evidence capsule

    Diagram
    AI-VLSI EVIDENCE CAPSULE 2
    
    PATH: ai-vlsi/ai-compute-hardware/memory-bandwidth-and-roofline/design-space
    WORKLOAD SLICE: <name>
    PRIMARY METRIC: <value/trend>
    FIRST FAILING LAYER: <data/model/runtime/hardware>
    OWNER: <name>
    PRIMARY ARTIFACT: <report/profile/dashboard>
    DECISION: <ship / rollback / escalate>

    Execution drill pack 3

    Use this pack to rehearse AI-for-VLSI decision making on ai-vlsi/ai-compute-hardware/memory-bandwidth-and-roofline/design-space: metric framing, mechanism proof, hardware implications, and release safety.

    Evidence checklist

    • Metric context includes workload, dataset slice, and revision tags.

    • Mechanism explanation links model behavior to observed outcome.

    • Hardware/runtime feasibility is profiled, not assumed.

    • Owner and rollback path are documented before rollout.

    Review prompts

    1. Which decision will this model output influence?

    2. What is the first failing layer when metric regresses?

    3. Which owner applies the smallest reversible fix?

    4. What validation matrix is required before deployment?

    Evidence capsule

    Diagram
    AI-VLSI EVIDENCE CAPSULE 3
    
    PATH: ai-vlsi/ai-compute-hardware/memory-bandwidth-and-roofline/design-space
    WORKLOAD SLICE: <name>
    PRIMARY METRIC: <value/trend>
    FIRST FAILING LAYER: <data/model/runtime/hardware>
    OWNER: <name>
    PRIMARY ARTIFACT: <report/profile/dashboard>
    DECISION: <ship / rollback / escalate>

    Execution drill pack 4

    Use this pack to rehearse AI-for-VLSI decision making on ai-vlsi/ai-compute-hardware/memory-bandwidth-and-roofline/design-space: metric framing, mechanism proof, hardware implications, and release safety.

    Evidence checklist

    • Metric context includes workload, dataset slice, and revision tags.

    • Mechanism explanation links model behavior to observed outcome.

    • Hardware/runtime feasibility is profiled, not assumed.

    • Owner and rollback path are documented before rollout.

    Review prompts

    1. Which decision will this model output influence?

    2. What is the first failing layer when metric regresses?

    3. Which owner applies the smallest reversible fix?

    4. What validation matrix is required before deployment?

    Evidence capsule

    Diagram
    AI-VLSI EVIDENCE CAPSULE 4
    
    PATH: ai-vlsi/ai-compute-hardware/memory-bandwidth-and-roofline/design-space
    WORKLOAD SLICE: <name>
    PRIMARY METRIC: <value/trend>
    FIRST FAILING LAYER: <data/model/runtime/hardware>
    OWNER: <name>
    PRIMARY ARTIFACT: <report/profile/dashboard>
    DECISION: <ship / rollback / escalate>

    Execution drill pack 5

    Use this pack to rehearse AI-for-VLSI decision making on ai-vlsi/ai-compute-hardware/memory-bandwidth-and-roofline/design-space: metric framing, mechanism proof, hardware implications, and release safety.

    Evidence checklist

    • Metric context includes workload, dataset slice, and revision tags.

    • Mechanism explanation links model behavior to observed outcome.

    • Hardware/runtime feasibility is profiled, not assumed.

    • Owner and rollback path are documented before rollout.

    Review prompts

    1. Which decision will this model output influence?

    2. What is the first failing layer when metric regresses?

    3. Which owner applies the smallest reversible fix?

    4. What validation matrix is required before deployment?

    Evidence capsule

    Diagram
    AI-VLSI EVIDENCE CAPSULE 5
    
    PATH: ai-vlsi/ai-compute-hardware/memory-bandwidth-and-roofline/design-space
    WORKLOAD SLICE: <name>
    PRIMARY METRIC: <value/trend>
    FIRST FAILING LAYER: <data/model/runtime/hardware>
    OWNER: <name>
    PRIMARY ARTIFACT: <report/profile/dashboard>
    DECISION: <ship / rollback / escalate>

    Execution drill pack 6

    Use this pack to rehearse AI-for-VLSI decision making on ai-vlsi/ai-compute-hardware/memory-bandwidth-and-roofline/design-space: metric framing, mechanism proof, hardware implications, and release safety.

    Evidence checklist

    • Metric context includes workload, dataset slice, and revision tags.

    • Mechanism explanation links model behavior to observed outcome.

    • Hardware/runtime feasibility is profiled, not assumed.

    • Owner and rollback path are documented before rollout.

    Review prompts

    1. Which decision will this model output influence?

    2. What is the first failing layer when metric regresses?

    3. Which owner applies the smallest reversible fix?

    4. What validation matrix is required before deployment?

    Evidence capsule

    Diagram
    AI-VLSI EVIDENCE CAPSULE 6
    
    PATH: ai-vlsi/ai-compute-hardware/memory-bandwidth-and-roofline/design-space
    WORKLOAD SLICE: <name>
    PRIMARY METRIC: <value/trend>
    FIRST FAILING LAYER: <data/model/runtime/hardware>
    OWNER: <name>
    PRIMARY ARTIFACT: <report/profile/dashboard>
    DECISION: <ship / rollback / escalate>

    Execution drill pack 7

    Use this pack to rehearse AI-for-VLSI decision making on ai-vlsi/ai-compute-hardware/memory-bandwidth-and-roofline/design-space: metric framing, mechanism proof, hardware implications, and release safety.

    Evidence checklist

    • Metric context includes workload, dataset slice, and revision tags.

    • Mechanism explanation links model behavior to observed outcome.

    • Hardware/runtime feasibility is profiled, not assumed.

    • Owner and rollback path are documented before rollout.

    Review prompts

    1. Which decision will this model output influence?

    2. What is the first failing layer when metric regresses?

    3. Which owner applies the smallest reversible fix?

    4. What validation matrix is required before deployment?

    Evidence capsule

    Diagram
    AI-VLSI EVIDENCE CAPSULE 7
    
    PATH: ai-vlsi/ai-compute-hardware/memory-bandwidth-and-roofline/design-space
    WORKLOAD SLICE: <name>
    PRIMARY METRIC: <value/trend>
    FIRST FAILING LAYER: <data/model/runtime/hardware>
    OWNER: <name>
    PRIMARY ARTIFACT: <report/profile/dashboard>
    DECISION: <ship / rollback / escalate>

    Execution drill pack 8

    Use this pack to rehearse AI-for-VLSI decision making on ai-vlsi/ai-compute-hardware/memory-bandwidth-and-roofline/design-space: metric framing, mechanism proof, hardware implications, and release safety.

    Evidence checklist

    • Metric context includes workload, dataset slice, and revision tags.

    • Mechanism explanation links model behavior to observed outcome.

    • Hardware/runtime feasibility is profiled, not assumed.

    • Owner and rollback path are documented before rollout.

    Review prompts

    1. Which decision will this model output influence?

    2. What is the first failing layer when metric regresses?

    3. Which owner applies the smallest reversible fix?

    4. What validation matrix is required before deployment?

    Evidence capsule

    Diagram
    AI-VLSI EVIDENCE CAPSULE 8
    
    PATH: ai-vlsi/ai-compute-hardware/memory-bandwidth-and-roofline/design-space
    WORKLOAD SLICE: <name>
    PRIMARY METRIC: <value/trend>
    FIRST FAILING LAYER: <data/model/runtime/hardware>
    OWNER: <name>
    PRIMARY ARTIFACT: <report/profile/dashboard>
    DECISION: <ship / rollback / escalate>

    Execution drill pack 9

    Use this pack to rehearse AI-for-VLSI decision making on ai-vlsi/ai-compute-hardware/memory-bandwidth-and-roofline/design-space: metric framing, mechanism proof, hardware implications, and release safety.

    Evidence checklist

    • Metric context includes workload, dataset slice, and revision tags.

    • Mechanism explanation links model behavior to observed outcome.

    • Hardware/runtime feasibility is profiled, not assumed.

    • Owner and rollback path are documented before rollout.

    Review prompts

    1. Which decision will this model output influence?

    2. What is the first failing layer when metric regresses?

    3. Which owner applies the smallest reversible fix?

    4. What validation matrix is required before deployment?

    Evidence capsule

    Diagram
    AI-VLSI EVIDENCE CAPSULE 9
    
    PATH: ai-vlsi/ai-compute-hardware/memory-bandwidth-and-roofline/design-space
    WORKLOAD SLICE: <name>
    PRIMARY METRIC: <value/trend>
    FIRST FAILING LAYER: <data/model/runtime/hardware>
    OWNER: <name>
    PRIMARY ARTIFACT: <report/profile/dashboard>
    DECISION: <ship / rollback / escalate>

    Execution drill pack 10

    Use this pack to rehearse AI-for-VLSI decision making on ai-vlsi/ai-compute-hardware/memory-bandwidth-and-roofline/design-space: metric framing, mechanism proof, hardware implications, and release safety.

    Evidence checklist

    • Metric context includes workload, dataset slice, and revision tags.

    • Mechanism explanation links model behavior to observed outcome.

    • Hardware/runtime feasibility is profiled, not assumed.

    • Owner and rollback path are documented before rollout.

    Review prompts

    1. Which decision will this model output influence?

    2. What is the first failing layer when metric regresses?

    3. Which owner applies the smallest reversible fix?

    4. What validation matrix is required before deployment?

    Evidence capsule

    Diagram
    AI-VLSI EVIDENCE CAPSULE 10
    
    PATH: ai-vlsi/ai-compute-hardware/memory-bandwidth-and-roofline/design-space
    WORKLOAD SLICE: <name>
    PRIMARY METRIC: <value/trend>
    FIRST FAILING LAYER: <data/model/runtime/hardware>
    OWNER: <name>
    PRIMARY ARTIFACT: <report/profile/dashboard>
    DECISION: <ship / rollback / escalate>

    Execution drill pack 11

    Use this pack to rehearse AI-for-VLSI decision making on ai-vlsi/ai-compute-hardware/memory-bandwidth-and-roofline/design-space: metric framing, mechanism proof, hardware implications, and release safety.

    Evidence checklist

    • Metric context includes workload, dataset slice, and revision tags.

    • Mechanism explanation links model behavior to observed outcome.

    • Hardware/runtime feasibility is profiled, not assumed.

    • Owner and rollback path are documented before rollout.

    Review prompts

    1. Which decision will this model output influence?

    2. What is the first failing layer when metric regresses?

    3. Which owner applies the smallest reversible fix?

    4. What validation matrix is required before deployment?

    Evidence capsule

    Diagram
    AI-VLSI EVIDENCE CAPSULE 11
    
    PATH: ai-vlsi/ai-compute-hardware/memory-bandwidth-and-roofline/design-space
    WORKLOAD SLICE: <name>
    PRIMARY METRIC: <value/trend>
    FIRST FAILING LAYER: <data/model/runtime/hardware>
    OWNER: <name>
    PRIMARY ARTIFACT: <report/profile/dashboard>
    DECISION: <ship / rollback / escalate>

    Execution drill pack 12

    Use this pack to rehearse AI-for-VLSI decision making on ai-vlsi/ai-compute-hardware/memory-bandwidth-and-roofline/design-space: metric framing, mechanism proof, hardware implications, and release safety.

    Evidence checklist

    • Metric context includes workload, dataset slice, and revision tags.

    • Mechanism explanation links model behavior to observed outcome.

    • Hardware/runtime feasibility is profiled, not assumed.

    • Owner and rollback path are documented before rollout.

    Review prompts

    1. Which decision will this model output influence?

    2. What is the first failing layer when metric regresses?

    3. Which owner applies the smallest reversible fix?

    4. What validation matrix is required before deployment?

    Evidence capsule

    Diagram
    AI-VLSI EVIDENCE CAPSULE 12
    
    PATH: ai-vlsi/ai-compute-hardware/memory-bandwidth-and-roofline/design-space
    WORKLOAD SLICE: <name>
    PRIMARY METRIC: <value/trend>
    FIRST FAILING LAYER: <data/model/runtime/hardware>
    OWNER: <name>
    PRIMARY ARTIFACT: <report/profile/dashboard>
    DECISION: <ship / rollback / escalate>

    Execution drill pack 13

    Use this pack to rehearse AI-for-VLSI decision making on ai-vlsi/ai-compute-hardware/memory-bandwidth-and-roofline/design-space: metric framing, mechanism proof, hardware implications, and release safety.

    Evidence checklist

    • Metric context includes workload, dataset slice, and revision tags.

    • Mechanism explanation links model behavior to observed outcome.

    • Hardware/runtime feasibility is profiled, not assumed.

    • Owner and rollback path are documented before rollout.

    Review prompts

    1. Which decision will this model output influence?

    2. What is the first failing layer when metric regresses?

    3. Which owner applies the smallest reversible fix?

    4. What validation matrix is required before deployment?

    Evidence capsule

    Diagram
    AI-VLSI EVIDENCE CAPSULE 13
    
    PATH: ai-vlsi/ai-compute-hardware/memory-bandwidth-and-roofline/design-space
    WORKLOAD SLICE: <name>
    PRIMARY METRIC: <value/trend>
    FIRST FAILING LAYER: <data/model/runtime/hardware>
    OWNER: <name>
    PRIMARY ARTIFACT: <report/profile/dashboard>
    DECISION: <ship / rollback / escalate>

    Principal AI-VLSI review addendum

    Roofline analysis links arithmetic intensity to memory bandwidth limits, exposing whether kernels are compute-bound or memory-bound.

    Metric: operational intensity, achieved TOPS, and bandwidth utilization

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    See also

    • Memory Bandwidth & Roofline: Mechanism
    • Memory Bandwidth & Roofline: Inputs & Outputs
    • Memory Bandwidth & Roofline: Reports & Metrics