What this topic teaches

Boundary Cell Design converts analog-digital assumptions into a measurable engineering contract. Boundary cells protect logic domains at analog interfaces by enforcing voltage tolerance, clamp behavior, and legal signal ownership during power sequencing. The hard part is proving which boundary broke first, under which mode, and with which evidence.

The senior-engineer question

When boundary violation count, level-shifter coverage, clamp correctness moves, can you isolate the first failing boundary, identify owner, and define the smallest reversible change that proves root cause?

AMS CLOSURE FLOW — Boundary Cell Design

spec + handoff assumptions
        |
        v
boundary implementation (wrapper/cells/reset)
        |
        v
physical context (floorplan/power/package)
        |
        v
metrics + artifacts (jitter/BER/noise/validity)
        |
        v
root-cause classification -> bounded fix -> regression

Debug rule: always name mode, boundary, evidence tag, and owner.

Picture the boundary behavior

Start every study session by drawing the contract before opening logs or reports. The diagrams below are what to reproduce on whiteboard.

Boundary cell intent

POWER DOMAIN A -> [level shifter / clamp / isolation] -> DOMAIN B

legal voltage + state crossing is explicit.
missing boundary logic converts into latent silicon risk.

Boundary sequence

AMS BOUNDARY SEQUENCE — Boundary Cell Design

analog macro -> wrapper / boundary cell -> synchronizer or sampler -> digital consumer
      |                 |                         |                     |
  analog assumptions    legal voltage/state       clock/reset contract   protocol/data validity

metric under watch: boundary violation count, level-shifter coverage, clamp correctness

Who owns which layer

AMS OWNERSHIP LAYERS — Boundary Cell Design

layer                owns                                failure mode
------------------   ----------------------------------  --------------------------
spec contract         clocks/resets/interfaces            hidden assumption drift
wrapper logic         synchronizers/framing/flags         silent data corruption
physical integration  floorplan/isolation/power           coupled noise and droop
signoff governance    waivers/checklists/dashboard        release with blind spots
closure               debug order + regression            fix regresses another mode

Evidence to collect

• Primary metric: boundary violation count, level-shifter coverage, clamp correctness.

• Primary artifact: boundary-cell checklist, level-shifter audit report, reset isolation table.

• Owners to bring into review: AMS integration lead, digital implementation owner, library owner.

• One tagged reproduction and one reduced reproducer.

• Cross-check from at least two evidence planes: functional and physical/signoff.

Ownership map

OWNERSHIP MAP — Boundary Cell Design

artifact                  owner
----------------------    -----------------------------
integration artifact    AMS integration lead
implementation artifact digital implementation owner
signoff artifact        library owner

Every boundary issue needs a named owner before fixes start.

Subpages in this topic

Each topic includes mechanism, contract I/O, reports, debug, worked example, pitfalls, interview, checklist, theory, design-space, extended case study, walkthrough, comparison matrix, software view, and silicon PPA impact.

Key takeaways

• Carry boundary and mode context with every metric.

• Prove mechanism with tagged evidence before changing silicon-facing logic.

• Close with explicit owner-aligned regression criteria.

Common pitfalls

• Assuming lock/ready/valid means healthy behavior.

• Ignoring package and power contributors in jitter/SerDes issues.

• Waivers without expiry, owner, or mitigation plan.

AMS deep dive

Boundary assumptions must be explicit, versioned, and testable.

Concept diagram

BOUNDARY CONTRACT FLOW

analog intent -> boundary implementation -> digital wrapper -> signed review

Metric graph

BOUNDARY RISK MIX

missing boundary cells    ███████
stale handoff assumptions ██████
silent mode changes       ████

Reports and artifacts

• boundary-cell coverage

• isolation/ESD review

• handoff contract checklist

• integration waiver log

Mini case study

Noise bursts traced to missing isolation clamp on one low-power transition mode.

Debug branches

• Validate boundary-cell insertion

• Diff handoff assumptions

• Reproduce with tagged mode sequence

Senior review question

Ask: what boundary condition proves this topic is actually closed?

Key takeaways

• State boundary, mode, and evidence tag with every claim.

• Always align analog, digital, and physical owners before signoff decisions.

Common pitfalls

• Fixing averages while tails still fail.

• Skipping package/supply evidence in jitter or SerDes issues.

• Shipping with waivers that lack owner and expiration criteria.