Review Checklist for Guard Rings & Substrate Control focuses on substrate noise coupling, isolation guard compliance, latch-up risk. The goal is to connect observed symptom to boundary mechanism, ownership, and signoff risk.
Boundary assumptions are versioned and signed.
Mode matrix (power/clock/reset/stress) is explicit.
Physical context (floorplan/package/power) is included where relevant.
Metric and artifact references are reproducible.
Waivers have owner, expiry, and mitigation.
Owners signed: custom layout owner, physical verification owner, analog lead.
OWNERSHIP MAP — Guard Rings & Substrate Control
artifact owner
---------------------- -----------------------------
integration artifact custom layout owner
implementation artifact physical verification owner
signoff artifact analog lead
Every boundary issue needs a named owner before fixes start.Physical proximity and boundary rules are functional constraints in AMS SoCs.
INTEGRATION FLOW
floorplan keepouts -> guard strategy -> abutment policy -> PV signoffINTEGRATION ESCAPES
layout boundary issues ███████
waiver drift ████keepout violations
guard-ring checks
abutment DRC
mixed-signal PV dashboard
Late macro move violated quiet-zone assumptions and caused intermittent converter noise excursions.
Review macro adjacency
Re-check guard assumptions
Re-run PV with correct deck variant
Ask: what boundary condition proves this topic is actually closed?
State boundary, mode, and evidence tag with every claim.
Always align analog, digital, and physical owners before signoff decisions.
Fixing averages while tails still fail.
Skipping package/supply evidence in jitter or SerDes issues.
Shipping with waivers that lack owner and expiration criteria.
Guard rings, deep n-well strategies, and substrate contacts shape current return and isolate sensitive analog circuits from digital switching noise.
Metric: substrate noise coupling, isolation guard compliance, latch-up risk
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