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Course contents

  • How to Use This Course
  • AMS Metrics Reference
  • AMS Interface Glossary
  • Reading Path
  • Analog-Digital Boundaries61
  • PLL & DLL Clocking61
  • SerDes & High-Speed I/O61
  • ADC / DAC Interfaces61
  • Mixed-Signal Integration61
    • AMS Floorplan Keepouts
    • Guard Rings & Substrate Control
    • Abutment Rules
    • Mixed-Signal Physical Verification
      • Mixed-Signal Physical Verification: Mechanism
      • Mixed-Signal Physical Verification: Inputs & Outputs
      • Mixed-Signal Physical Verification: Reports & Metrics
      • Mixed-Signal Physical Verification: Debug Playbook
      • Mixed-Signal Physical Verification: Worked Example
      • Mixed-Signal Physical Verification: Pitfalls & Red Flags
      • Mixed-Signal Physical Verification: Interview Drills
      • Mixed-Signal Physical Verification: Review Checklist
      • Mixed-Signal Physical Verification: Theory Deep Dive
      • Mixed-Signal Physical Verification: Design Space
      • Mixed-Signal Physical Verification: Expanded Case Study
      • Mixed-Signal Physical Verification: Step-by-Step Walkthrough
      • Mixed-Signal Physical Verification: Comparison Matrix
      • Mixed-Signal Physical Verification: Software / Programmer View
      • Mixed-Signal Physical Verification: Silicon PPA Impact
    • Mixed-Signal Integration: Tricky Q&A
  • Noise & IR at the Boundary61
  • AMS Interface Interview Prep61
  • AMS Interface Cheatsheet
Loading lesson

‹Mixed-Signal Integration
  1. Topics
  2. Analog & Mixed-Signal
  3. Mixed-Signal Integration
  4. Mixed-Signal Physical Verification

AMS Interface · All levels

Mixed-Signal Physical Verification

Mixed-Signal Integration: Mixed-signal PV combines digital and analog rule decks, LVS partition assumptions, and waiver discipline to achieve manufacturable signoff.

  • 15topics
  • 15lessons

Topics in this section

  1. 1Mixed-Signal Physical Verification: Mechanism1 lesson
  2. 2Mixed-Signal Physical Verification: Inputs & Outputs1 lesson
  3. 3Mixed-Signal Physical Verification: Reports & Metrics1 lesson
  4. 4Mixed-Signal Physical Verification: Debug Playbook1 lesson
  5. 5Mixed-Signal Physical Verification: Worked Example1 lesson
  6. 6Mixed-Signal Physical Verification: Pitfalls & Red Flags1 lesson
  7. 7Mixed-Signal Physical Verification: Interview Drills1 lesson
  8. 8Mixed-Signal Physical Verification: Review Checklist1 lesson
  9. 9Mixed-Signal Physical Verification: Theory Deep Dive1 lesson
  10. 10Mixed-Signal Physical Verification: Design Space1 lesson
  11. 11Mixed-Signal Physical Verification: Expanded Case Study1 lesson
  12. 12Mixed-Signal Physical Verification: Step-by-Step Walkthrough1 lesson
  13. 13Mixed-Signal Physical Verification: Comparison Matrix1 lesson
  14. 14Mixed-Signal Physical Verification: Software / Programmer View1 lesson
  15. 15Mixed-Signal Physical Verification: Silicon PPA Impact1 lesson
On this page

    What this topic teaches

    Mixed-Signal Physical Verification converts analog-digital assumptions into a measurable engineering contract. Mixed-signal PV combines digital and analog rule decks, LVS partition assumptions, and waiver discipline to achieve manufacturable signoff. The hard part is proving which boundary broke first, under which mode, and with which evidence.

    The senior-engineer question

    When AMS PV closure rate, signoff waiver count, rerun turnaround moves, can you isolate the first failing boundary, identify owner, and define the smallest reversible change that proves root cause?

    Diagram
    AMS CLOSURE FLOW — Mixed-Signal Physical Verification
    
    spec + handoff assumptions
            |
            v
    boundary implementation (wrapper/cells/reset)
            |
            v
    physical context (floorplan/power/package)
            |
            v
    metrics + artifacts (jitter/BER/noise/validity)
            |
            v
    root-cause classification -> bounded fix -> regression
    
    Debug rule: always name mode, boundary, evidence tag, and owner.

    Picture the boundary behavior

    Start every study session by drawing the contract before opening logs or reports. The diagrams below are what to reproduce on whiteboard.

    Mixed-signal PV closure

    Diagram
    DRC + LVS + ERC + analog-specific checks
              -> waiver review
              -> AMS release gate

    Boundary sequence

    Diagram
    AMS BOUNDARY SEQUENCE — Mixed-Signal Physical Verification
    
    analog macro -> wrapper / boundary cell -> synchronizer or sampler -> digital consumer
          |                 |                         |                     |
      analog assumptions    legal voltage/state       clock/reset contract   protocol/data validity
    
    metric under watch: AMS PV closure rate, signoff waiver count, rerun turnaround

    Who owns which layer

    Diagram
    AMS OWNERSHIP LAYERS — Mixed-Signal Physical Verification
    
    layer                owns                                failure mode
    ------------------   ----------------------------------  --------------------------
    spec contract         clocks/resets/interfaces            hidden assumption drift
    wrapper logic         synchronizers/framing/flags         silent data corruption
    physical integration  floorplan/isolation/power           coupled noise and droop
    signoff governance    waivers/checklists/dashboard        release with blind spots
    closure               debug order + regression            fix regresses another mode

    Evidence to collect

    • Primary metric: AMS PV closure rate, signoff waiver count, rerun turnaround.

    • Primary artifact: PV signoff dashboard, LVS mismatch summary, waiver approvals.

    • Owners to bring into review: PV lead, analog layout owner, program signoff owner.

    • One tagged reproduction and one reduced reproducer.

    • Cross-check from at least two evidence planes: functional and physical/signoff.

    Ownership map

    Diagram
    OWNERSHIP MAP — Mixed-Signal Physical Verification
    
    artifact                  owner
    ----------------------    -----------------------------
    integration artifact    PV lead
    implementation artifact analog layout owner
    signoff artifact        program signoff owner
    
    Every boundary issue needs a named owner before fixes start.

    Subpages in this topic

    Each topic includes mechanism, contract I/O, reports, debug, worked example, pitfalls, interview, checklist, theory, design-space, extended case study, walkthrough, comparison matrix, software view, and silicon PPA impact.

    Key takeaways

    • Carry boundary and mode context with every metric.

    • Prove mechanism with tagged evidence before changing silicon-facing logic.

    • Close with explicit owner-aligned regression criteria.

    Common pitfalls

    • Assuming lock/ready/valid means healthy behavior.

    • Ignoring package and power contributors in jitter/SerDes issues.

    • Waivers without expiry, owner, or mitigation plan.

    AMS deep dive

    Physical proximity and boundary rules are functional constraints in AMS SoCs.

    Concept diagram

    Diagram
    INTEGRATION FLOW
    
    floorplan keepouts -> guard strategy -> abutment policy -> PV signoff

    Metric graph

    Diagram
    INTEGRATION ESCAPES
    
    layout boundary issues ███████
    waiver drift           ████

    Reports and artifacts

    • keepout violations

    • guard-ring checks

    • abutment DRC

    • mixed-signal PV dashboard

    Mini case study

    Late macro move violated quiet-zone assumptions and caused intermittent converter noise excursions.

    Debug branches

    • Review macro adjacency

    • Re-check guard assumptions

    • Re-run PV with correct deck variant

    Senior review question

    Ask: what boundary condition proves this topic is actually closed?

    Key takeaways

    • State boundary, mode, and evidence tag with every claim.

    • Always align analog, digital, and physical owners before signoff decisions.

    Common pitfalls

    • Fixing averages while tails still fail.

    • Skipping package/supply evidence in jitter or SerDes issues.

    • Shipping with waivers that lack owner and expiration criteria.

    PreviousNext: Mixed-Signal Physical Verification: Mechanism

    Up next

    Up nextMixed-Signal Physical Verification: Mechanism

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    See also

    • AMS Floorplan Keepouts
    • Guard Rings & Substrate Control
    • Abutment Rules