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Course contents

  • How to Use This Course
  • AMS Metrics Reference
  • AMS Interface Glossary
  • Reading Path
  • Analog-Digital Boundaries61
  • PLL & DLL Clocking61
  • SerDes & High-Speed I/O61
  • ADC / DAC Interfaces61
  • Mixed-Signal Integration61
    • AMS Floorplan Keepouts
    • Guard Rings & Substrate Control
    • Abutment Rules
    • Mixed-Signal Physical Verification
      • Mixed-Signal Physical Verification: Mechanism
      • Mixed-Signal Physical Verification: Inputs & Outputs
      • Mixed-Signal Physical Verification: Reports & Metrics
      • Mixed-Signal Physical Verification: Debug Playbook
      • Mixed-Signal Physical Verification: Worked Example
      • Mixed-Signal Physical Verification: Pitfalls & Red Flags
      • Mixed-Signal Physical Verification: Interview Drills
      • Mixed-Signal Physical Verification: Review Checklist
      • Mixed-Signal Physical Verification: Theory Deep Dive
      • Mixed-Signal Physical Verification: Design Space
      • Mixed-Signal Physical Verification: Expanded Case Study
      • Mixed-Signal Physical Verification: Step-by-Step Walkthrough
      • Mixed-Signal Physical Verification: Comparison Matrix
      • Mixed-Signal Physical Verification: Software / Programmer View
      • Mixed-Signal Physical Verification: Silicon PPA Impact
    • Mixed-Signal Integration: Tricky Q&A
  • Noise & IR at the Boundary61
  • AMS Interface Interview Prep61
  • AMS Interface Cheatsheet
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‹Mixed-Signal Physical Verification
  1. Topics
  2. Analog & Mixed-Signal
  3. Mixed-Signal Integration
  4. Mixed-Signal Physical Verification
  5. Mixed-Signal Physical Verification: Silicon PPA Impact

AMS Interface · All levels

Mixed-Signal Physical Verification: Silicon PPA Impact

Silicon PPA Impact for Mixed-Signal Physical Verification.

On this page

    Silicon PPA and closure impact

    Integration hygiene determines whether analog macros survive digital proximity.

    Area drivers

    • Boundary cells and guards add area

    • Routing keepouts can increase utilization pressure

    Power drivers

    • Added margins cost power

    • Jitter/noise mitigation can increase static and dynamic budgets

    Timing impact

    • Jitter and uncertainty consume timing

    • IR/noise shifts practical timing margin

    PD consequences

    • Keepouts and strap topology alter congestion and CTS paths

    • Package constraints affect lane routing

    Verification burden

    • Need aligned AMS + digital + package evidence

    • Waiver discipline is mandatory

    Diagram
    PPA — Mixed-Signal Physical Verification
    area/power/timing/closure-time tradeoff

    PPA takeaways

    • Mixed-signal fixes are multi-objective

    • Signoff is cross-team, not single-report

    Design option PPA snapshot

    Diagram
    BEFORE / AFTER — Mixed-Signal Physical Verification
    
    health score
      ^
      |                     --- target
      |         o regressed
      |               o before fix
      |                    o after bounded fix
      +--------------------------------------> debug iteration
    
    Prove signal quality, timing margin, and integration safety together.

    AMS deep dive

    Physical proximity and boundary rules are functional constraints in AMS SoCs.

    Concept diagram

    Diagram
    INTEGRATION FLOW
    
    floorplan keepouts -> guard strategy -> abutment policy -> PV signoff

    Metric graph

    Diagram
    INTEGRATION ESCAPES
    
    layout boundary issues ███████
    waiver drift           ████

    Reports and artifacts

    • keepout violations

    • guard-ring checks

    • abutment DRC

    • mixed-signal PV dashboard

    Mini case study

    Late macro move violated quiet-zone assumptions and caused intermittent converter noise excursions.

    Debug branches

    • Review macro adjacency

    • Re-check guard assumptions

    • Re-run PV with correct deck variant

    Senior review question

    Ask: what boundary condition proves this topic is actually closed?

    Key takeaways

    • State boundary, mode, and evidence tag with every claim.

    • Always align analog, digital, and physical owners before signoff decisions.

    Common pitfalls

    • Fixing averages while tails still fail.

    • Skipping package/supply evidence in jitter or SerDes issues.

    • Shipping with waivers that lack owner and expiration criteria.

    Principal AMS review addendum

    Mixed-signal PV combines digital and analog rule decks, LVS partition assumptions, and waiver discipline to achieve manufacturable signoff.

    Metric: AMS PV closure rate, signoff waiver count, rerun turnaround

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    See also

    • Mixed-Signal Physical Verification: Mechanism
    • Mixed-Signal Physical Verification: Inputs & Outputs
    • Mixed-Signal Physical Verification: Reports & Metrics