Coherence has two obligations: control who may access a line, and preserve the right value when permission changes hands. This topic makes those obligations concrete on the two-cache course model. You will classify permissions, track the value owed to the next reader, explain why invalidation must finish before a write grant, and find the first unsafe step in a short trace.
Lesson | After it you can... |
|---|---|
Distinguish one writable holder from a read epoch, including zero readers. | |
Reject a wrong value even when every permission looks legal. | |
Explain the acknowledgement boundary and compare two propagation policies. | |
Locate the first unsafe grant before a stale load exposes it. |
Suggested order: take the four lessons in order. Keep the course model open for state and message meanings. The examples use private write-back caches C0 and C1, home H with a directory and memory controller, and memory (participant M in the diagrams). X is one location inside a 64-byte line that starts uncached with X = 0 in memory; permissions cover the whole line.
Delivery and grant-delivery assumptions: see the course model.
No. Two writable caches violate permission safety even with equal bits. Conversely, two read-only caches can agree on an obsolete value. Check both permissions and the value inherited from the preceding write epoch.