On silicon there is no waveform and no rerun on demand. A coherence bug shows up as a stale value, a hang or a performance cliff, often rarely. This part teaches how to collect the evidence that rebuilds a transaction, how to map a symptom to a mechanism, which observability to design in before tape-out, and how a post-silicon regression and a configuration workaround keep a known bug contained.
Lesson | After it you can... |
|---|---|
Rebuild a transaction from a captured message trace. | |
Find which agent supplied a stale value and why. | |
Classify a hang from pending entries and MSHRs. | |
Map symptoms to likely mechanisms and first evidence. | |
Choose trace fields, filters and buffer depth. | |
Read coherence counters and derived metrics. | |
Design in hooks that make races observable. | |
Turn a rare failure into a repeatable test. | |
Interpret litmus outcome counts on hardware. | |
Choose and verify a configuration workaround. | |
Build a post-silicon coherence regression. | |
Follow one escape from symptom to prevention. |
The general debug method (reproduce, observe, localise, fix) is taught in the Hardware Debug course; this part adds the coherence-specific evidence and links there for the rest. All incidents and numbers here are illustrative.
Capture the state that explains the hang before anything is reset: H's pending entries, each cache's MSHRs and the recent messages for the stuck address. A rerun may take hours to fail again and will not show the dependency; the pending entries show who waits for what, which distinguishes a lost message from a deadlock or a starved request.