Why Coherence Exists · cache-coherency

Part 1 · Why Coherence Exists · All levels

2topics
8lessons

Begin with two caches that can hold the same address. A local copy makes a load fast, but another core may write while that copy exists. This section separates the three questions a correct system must answer: may I use this copy, may I change it, and where must the next requester obtain the newest value?

Learning sequence from cached copies and disagreement to permissions, dirty data responsibility and access epochs.

Read the shared-data topic before permissions and values.

Eight lessons

Lesson	After it you can...
Caches, Lines and Write-back	Explain the unit of caching and why memory may lag a cache.
Two Cores Disagree	Identify the failure that uncoordinated copies create.
What Coherence Promises	Separate permission and data-value obligations from cross-address ordering.
The Course Model in Action	Read a message diagram alongside a state/value table.
Permission Versus Data	Distinguish stored bits from authority to use or modify them.
Who Has the Newest Data?	Follow the newest value from a dirty cache through H to memory, rather than assuming memory has it.
Dirty Responsibility	Preserve the newest value across a handoff or eviction.
Epochs and Serialization	Explain how access rights move between readers and a writer.

Check yourself Why does adding a faster shared memory not by itself solve conflicting private copies?

A core can satisfy a load from its private cache without consulting that memory. The system must coordinate permissions and value transfer, or the core can keep using a stale private copy.

Related topics

Up nextCaches and Shared Data

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Eight lessons

Lesson	After it you can...
Caches, Lines and Write-back	Explain the unit of caching and why memory may lag a cache.
Two Cores Disagree	Identify the failure that uncoordinated copies create.
What Coherence Promises	Separate permission and data-value obligations from cross-address ordering.
The Course Model in Action	Read a message diagram alongside a state/value table.
Permission Versus Data	Distinguish stored bits from authority to use or modify them.
Who Has the Newest Data?	Follow the newest value from a dirty cache through H to memory, rather than assuming memory has it.
Dirty Responsibility	Preserve the newest value across a handoff or eviction.
Epochs and Serialization	Explain how access rights move between readers and a writer.

Check yourself Why does adding a faster shared memory not by itself solve conflicting private copies?

A core can satisfy a load from its private cache without consulting that memory. The system must coordinate permissions and value transfer, or the core can keep using a stale private copy.