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Course contents

  • How to Use This Course
  • Reading Path
  • Cache Coherency Glossary
  • The Shared Course Model
  • Cache Coherency Revision Sheet
  • Why Coherence Exists8
    • Caches and Shared Data
      • Caches, Lines and Write-Back
      • Two Cores Disagree
      • What Coherence Promises
      • The Course Model in Action
    • Permissions and Values
  • States and Protocols12
  • Transactions12
  • Races and Controller Design8
  • Progress and the Fabric16
  • Ordering and Synchronization12
  • Performance and Scalability12
  • Real Protocols12
  • SoC Integration12
  • Power, Clocking and Reliability12
  • Verification12
  • Debug and Bring-up12
  • Interview and Design Review17
  • Capstone: A Coherent Model Lab5
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‹Caches and Shared Data
  1. Topics
  2. Cache Coherency
  3. Why Coherence Exists
  4. Caches and Shared Data
  5. Caches, Lines and Write-Back

Part 1 · Why Coherence Exists · All levels

Caches, Lines and Write-Back

Follow a cold MESI read and silent local store to distinguish a cache line, write permission and memory freshness.

On this page

    Why can memory still contain the old value?

    A store need not travel to memory immediately. In a write-back cache it can change the local line while memory keeps the previous version. The important question is whether anyone else can use that previous version. Prerequisite: a load reads a value and a store changes one; cache indexing and replacement are outside this lesson.

    Our machine has C0 and C1 with private write-back caches, a home H containing a directory and memory controller, and memory. X is one location inside a 64-byte line; permissions cover the whole line, and a store changes only the bytes of X. Initially memory holds X = 0 and neither cache has a usable copy.

    One read, then one local store

    This trace selects MESI: H may return E when no other cache holds the line. E means exclusive and clean; a local store is allowed and silently changes E to M, which means exclusive and dirty. The later store therefore needs no new permission request. This optimisation and the E/M distinction appear in the primary gem5 MESI Two Level documentation.

    C0 requests X from H, receives value zero with E permission, then silently stores one while C1 remains invalid.
    MESI cold read: two numbered messages, followed by local event L.

    Step

    C0 state / value

    C1 state / value

    H directory

    Memory

    Newest data

    Initial

    I / -

    I / -

    U

    0

    Memory: 0

    1. GetS received

    IS^D / -

    I / -

    U, pend GetS C0

    0

    Memory: 0

    2. Data received

    E / 0

    I / -

    U, pend GetS C0

    0

    C0 and memory: 0

    (assumed) grant delivered

    E / 0

    I / -

    exclusive(C0)

    0

    C0 and memory: 0

    L. Local store

    M / 1

    I / -

    exclusive(C0)

    0

    C0: 1

    In IS^D C0 cannot read or write X yet: it has asked for the line but holds no usable value until step 2.

    What the directory actually knows

    U means no cached copy and memory authoritative. H keeps its pending entry in the row where C0 receives Data; once the grant is delivered (the '(assumed) grant delivered' row, see the Course Model), H records exclusive(C0). That directory entry describes permission, not C0's exact cache state. At L, C0 changes E to M without notifying H, so H must allow for the possibility that memory is stale.

    Common pitfall

    Do not serve C1 from memory merely because H last supplied a clean line to C0. After an E grant, a silent store may have changed it. H must coordinate with the exclusive holder before granting a conflicting request.

    Interview

    Explain write-back by naming all three facts: C0 has write permission, C0 holds the new value, and C0 is responsible for preserving dirty data. Memory freshness alone does not decide correctness.

    Check yourself After L, C1 sends GetS. Can H answer from memory = 0 while it records exclusive(C0)?

    No. exclusive(C0) is compatible with both E / 0 and M / 1 because the E-to-M store is silent. H knows where exclusive permission resides, not whether memory is current, so it must forward the request to C0 (Fwd-GetS) and use the value C0 supplies. Who Has the Newest Data? follows that read.

    Related topics

    • Course Model

    • Next: Two Cores Disagree

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    See also

    • What Coherence Promises
    • The Course Model in Action