Weak: A set of signals. Strong: A contract between two sides: the signals, what their values mean, and when a value counts, checkable on the wires alone so each side can be built and verified separately.

Weak: Hardware and software. Strong: Signals (the wires), meaning (what values stand for) and timing (when a value counts).

Weak: The clock is too slow. Strong: Clock skew and propagation delay become a large part of the cycle, so the receiver can't sample reliably; long links send the clock with the data or embed it in the data instead.

Weak: It uses the sender's clock. Strong: Both sides agree the baud rate; the receiver re-aligns on each start bit and oversamples to sample near the middle of each bit.

Weak: One with a shared clock. Strong: The sender forwards a clock or strobe alongside the data, so both see the same delay; DDR's DQS is an example.

Weak: It recovers lost data. Strong: It extracts the clock from transitions in the data stream, so no separate clock wire is needed.

Weak: For speed. Strong: Clock recovery needs edges; long runs of identical bits let the receiver drift. Line codes, scrambling and bit stuffing guarantee transitions.

Weak: It counts bits from power-up. Strong: By a marker the data cannot contain: a start bit, a special control symbol, a sync header or a flag, followed by framing rules such as a length field or end marker.

Weak: Adding padding at the end. Strong: Inserting an extra bit after a run of identical bits (USB after six 1s) so the data never looks like a control pattern and keeps transitions; the receiver removes it.

Weak: 8%. Strong: 20%: 8 data bits in 10 line bits. 128b/130b is about 1.5%.

Weak: Valid and ready must both be high. Strong: A transfer happens on a cycle where both are high; valid must not wait for ready; once valid is high it stays high with stable data until the transfer; ready may depend on valid.

Weak: For speed. Strong: If valid waited for ready and ready waited for valid, neither would ever assert: deadlock.

Weak: A slow clock. Strong: A cycle in which the receiver holds off completion (PREADY or HREADY low) so a slow target can finish.

Weak: To store extra data. Strong: To break the combinational ready path when registering it: it catches the data already sent in the cycle ready fell, so throughput stays full.

Weak: Direction of data. Strong: In push the sender decides when to send and the receiver must keep up or back-pressure; in pull the receiver asks for each item.

Weak: To make links faster. Strong: So a fast sender cannot overrun a slower receiver's buffer and lose data.

Weak: Paying for bandwidth. Strong: The receiver gives the sender credits for free buffer slots; the sender sends only with a credit and gets it back when the slot is freed, so overflow is impossible.

Weak: As big as possible. Strong: At least the data the sender can send in one credit round trip: rate times round-trip time.

Weak: It is too simple. Strong: The stop signal takes a round trip to take effect, so the receiver needs headroom for data already in flight, and the link idles while restarting.

Weak: Lossless is better. Strong: Lossless links never drop for congestion (they back-pressure); lossy links drop and rely on retry above. Lossless can spread congestion; lossy wastes bandwidth on retransmission.

Weak: Posted writes are faster. Strong: A posted write gets no response, so the requester moves on immediately; a non-posted write is acknowledged, so the requester knows it completed.

Weak: For tidiness. Strong: A requester waiting for a response that never comes hangs; two responses confuse matching.

Weak: A fast transfer. Strong: Several data beats for one address request, saving address bandwidth; protocols limit length and boundaries (AXI 4 KB).

Weak: Memory pages. Strong: So one burst never spans two targets or two memory-management pages, keeping decoding and protection simple.

Weak: Error bits. Strong: One bit per byte lane saying which bytes of a write are valid, so narrow and unaligned writes don't overwrite neighbours.

Weak: A failed one. Strong: A request issued whose response has not yet returned; allowing many hides latency.

Weak: A queueing formula. Strong: Items in a system = arrival rate × time in system; for links, outstanding requests = throughput × latency.

Weak: For debugging. Strong: To match responses to requests when several are outstanding and may return out of order.

Weak: Everything is in order. Strong: Same-ID transactions complete in order; different IDs in any order; no ordering between reads and writes.

Weak: A firewall. Strong: An operation that completes only after all earlier operations it covers are complete, so later ones are ordered after them.

Weak: Equal bandwidth. Strong: Every requester is served within N grants, so nobody starves.

Weak: A deadlock. Strong: A requester that is never served while others are, although the system keeps running.

Weak: Two requesters waiting. Strong: Mutual exclusion, hold and wait, no preemption and circular wait; break any one to prevent deadlock.

Weak: None. Strong: In deadlock nothing moves; in livelock things keep moving (retries) but nothing makes progress.

Weak: To save power. Strong: To turn a hang into a reported error when a response never comes.

Weak: All errors. Strong: Any odd number of flipped bits; it misses even numbers and cannot correct.

Weak: No errors. Strong: An r-bit CRC detects every burst error of r bits or fewer and almost all other errors.

Weak: A type of memory. Strong: Single error correct, double error detect: an ECC code with minimum distance 4.

Weak: The receiver sends everything back. Strong: The receiver acknowledges good packets and NAKs bad ones; the sender keeps copies until acknowledged and resends on NAK or timeout.

Weak: To count packets. Strong: So the receiver can tell a resent packet from a new one and discard duplicates.