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Course contents

  • How to Use This Course
  • Reading Paths
  • Concept Map
  • How to Read the Diagrams
  • Part 0: What Is a Protocol?10
  • Part 1: Timing and Clocking11
  • Part 2: Encoding and Framing12
  • Part 3: Handshakes13
  • Part 4: Flow Control17
  • Part 5: Transactions19
  • Part 6: Concurrency and Performance17
  • Part 7: Ordering13
  • Part 8: Sharing and Arbitration12
  • Part 9: Deadlock and Liveness13
  • Part 10: Reliability and Recovery20
  • Part 11: Bring-Up and Link Management10
  • Part 12: Power8
    • Idle Detection
    • Link Power States
    • Break-Even Time
    • Low-Power Handshakes
    • Quiescing and Draining
    • Wake Signalling
    • Protocols Compared: Power
    • Drills: Power
  • Part 13: Shared State and Coherence9
  • Part 14: Security and Isolation7
  • Part 15: Specifying and Verifying11
  • Part 16: Protocols Dissected17
  • Part 17: Capstones5
  • Part 18: Interview Preparation6
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‹Part 12: Power
  1. Topics
  2. First Principles of Hardware Protocols
  3. Part 12: Power
  4. Drills: Power

Part 12 · Power · All levels

Drills: Power

Interview questions, a whiteboard exercise and a ten-question checkpoint for Part 12.

On this page

    Answer each question out loud before opening it. If you miss more than three in the checkpoint, revisit the lessons linked at the end.

    Interview questions

    Check yourself When should a link enter low power?

    When nothing is pending in either direction, for longer than a timeout set from break-even time and latency tolerance.

    Check yourself Why several low-power states?

    Power saved and exit latency trade off; light states suit short gaps, deep ones long idle periods.

    Check yourself What is break-even time?

    The idle length at which sleeping and staying on cost the same: (P_tr − P_lp) × T_tr / (P_on − P_lp).

    Check yourself Why may a device deny a sleep request?

    Only it knows whether it has outstanding or imminent work; denial prevents being cut off mid-transaction.

    Check yourself How do you power down a block with transactions in flight?

    Stop new requests, wait for outstanding ones, flush posted writes, settle credits, confirm, isolate, then cut power.

    Check yourself How is a device woken from a deep state?

    A sideband wire or a low-power in-band detector; the link then retrains before traffic.

    Whiteboard exercise

    Task. A 4-lane chip-to-chip link draws 400 mW active, 40 mW in its deep state, and takes 20 µs to enter and leave at 500 mW. Idle periods are bursty: many of 2 to 5 µs between packets, a few of 1 ms between bursts. The attached device tolerates 50 µs of extra latency. Design the power policy.

    Check yourself Open a model answer

    Break-even of the deep state: (500 − 40) × 20 / (400 − 40) ≈ 25.6 µs. The 2 to 5 µs gaps are far below it, so the deep state must not be used there; a light state with sub-microsecond exit (if available) can take them, or the link simply stays on. The 1 ms gaps are about 40× break-even: sleep deep, saving roughly 90% of the energy in those gaps. Policy: a deep-state timeout of about 30 µs (above break-even and above the longest intra-burst gap, so gaps never trigger it). Latency: exit is within 20 µs, below the 50 µs tolerance, so allowed. Entry by handshake: the device accepts only with nothing outstanding and nothing queued, otherwise denies. Wake: the device signals on a sideband wire or in-band beacon when it has data; the host wakes the link when it has work. Verify the request-during-entry race and measure wakes per second against the model.

    Checkpoint: ten questions

    Check yourself 1. Name three things besides an empty transmit queue that must be true for idle.

    No outstanding requests, no credits owed, no acknowledgements owed (and nothing queued above).

    Check yourself 2. What happens to a request arriving while asleep?

    It is held, the link wakes, and the request is served after the wake time.

    Check yourself 3. Why can a too-short idle timeout raise power?

    The link sleeps through gaps shorter than break-even, paying transitions that cost more than they save.

    Check yourself 4. What is the difference between a link state and a device state?

    The link state is what the wires are doing; the device state is how much of the device is working.

    Check yourself 5. P_on 100, P_lp 10, P_tr 100 mW, T_tr 5 µs. T_be?

    (100 − 10) × 5 / 90 = 5 µs.

    Check yourself 6. What does a timeout policy trade?

    Some energy for fewer wakes (and so less added latency).

    Check yourself 7. Name the AMBA Q-Channel signals.

    QREQn, QACCEPTn, QDENY, QACTIVE.

    Check yourself 8. Why flush posted writes when quiescing?

    They get no response, so they look done while they may still be in a buffer.

    Check yourself 9. Why must isolation come before power removal?

    A powering-down block's outputs float; isolation clamps them to safe values for the blocks still on.

    Check yourself 10. What must stay powered for sideband wake to work?

    Whatever monitors the wake signal, typically an always-on power controller.

    Revisit

    • 12.1 Idle Detection

    • 12.2 Link Power States

    • 12.3 Break-Even Time

    • 12.4 Low-Power Handshakes

    • 12.5 Quiescing and Draining

    • 12.6 Wake Signalling

    Keep going

    Next: Part 13: Shared State and Coherence. What if there are several copies of one value?

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    See also

    • Idle Detection
    • Link Power States
    • Break-Even Time