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Course contents

  • How to Use This Course
  • Reading Path
  • Cache Coherency Glossary
  • The Shared Course Model
  • Cache Coherency Revision Sheet
  • Why Coherence Exists8
  • States and Protocols12
  • Transactions12
  • Races and Controller Design8
  • Progress and the Fabric16
  • Ordering and Synchronization12
  • Performance and Scalability12
  • Real Protocols12
  • SoC Integration12
  • Power, Clocking and Reliability12
  • Verification12
    • Coherency Scoreboards and Reference Models
    • Formal Properties for Coherency Safety
    • Coverage Closure and Waiver Governance
      • State and Transition Coverage
      • Race and Cross Coverage
      • Directed Race Stress
      • Closure Evidence
  • Debug and Bring-up12
  • Interview and Design Review17
  • Capstone: A Coherent Model Lab5
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‹Verification
  1. Topics
  2. Cache Coherency
  3. Verification
  4. Coverage Closure and Waiver Governance

Part 11 · Verification · All levels

Coverage Closure and Waiver Governance

Derive coverage from the protocol table, make races happen on purpose, and decide when a coherence block is closed.

  • 4topics
  • 4lessons

A scoreboard tells you whether a run was wrong. Coverage tells you whether the runs went anywhere interesting. For a coherence controller the interesting places are known in advance: every cell of the protocol table, and above all the cells where a conflicting message meets a transient state. This topic turns that table into a coverage model, shows why random traffic rarely reaches the race cells and how to force it, and defines the evidence, including waivers, that lets a team say the block is closed.

General coverage technique (covergroups, crosses, closure curves, holes) is taught in First Principles of Verification Strategy: Coverage. Here it is applied to the course's MSI controller.

Lesson

After it you can...

State and Transition Coverage

Build the state x event matrix from the protocol table, cover every legal cell and assert the impossible ones.

Race and Cross Coverage

Name the race crosses (Inv in SM^D, Fwd in MI^A, a Put crossing a forward) and estimate how often random traffic hits them.

Directed Race Stress

Choose stimulus knobs (hot lines, tiny caches, class delays, back-pressure) that open each race window.

Closure Evidence

List the evidence for sign-off, write and review a waiver, and refuse one that hides a reachable race.

Suggested order: the four lessons in sequence, after Transient States and Races and alongside the sibling topics on scoreboards and reference models and formal properties.

Check yourself Every cell of the controller's state x event matrix has been hit at least once in regression. Is the block closed?

No. Hitting cells shows the stimulus reached them; it says nothing about whether the results were right (that needs a value checker with zero failures), whether the race crosses were reached in both orders, whether the impossible cells are asserted rather than merely unhit, or whether SWMR is proven on a small model. Cell coverage is one row of the sign-off checklist, not the whole of it.

Related topics

  • Shared course model

  • Prerequisite: transient states and races

  • Coverage fundamentals (First Principles of Verification Strategy)

PreviousNext: State and Transition Coverage

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See also

  • Coherency Scoreboards and Reference Models
  • Formal Properties for Coherency Safety