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Course contents

  • How to Use This Course
  • Reading Path
  • Cache Coherency Glossary
  • The Shared Course Model
  • Cache Coherency Revision Sheet
  • Why Coherence Exists8
  • States and Protocols12
  • Transactions12
  • Races and Controller Design8
  • Progress and the Fabric16
  • Ordering and Synchronization12
  • Performance and Scalability12
  • Real Protocols12
  • SoC Integration12
  • Power, Clocking and Reliability12
  • Verification12
    • Coherency Scoreboards and Reference Models
    • Formal Properties for Coherency Safety
      • SWMR as an Assertion
      • Safety Versus Liveness
      • Assumptions and Vacuity
      • Small Models and Parameters
    • Coverage Closure and Waiver Governance
  • Debug and Bring-up12
  • Interview and Design Review17
  • Capstone: A Coherent Model Lab5
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‹Verification
  1. Topics
  2. Cache Coherency
  3. Verification
  4. Formal Properties for Coherency Safety

Part 11 · Verification · All levels

Formal Properties for Coherency Safety

Write SWMR and the data-value invariant as checkable properties, separate safety from liveness, guard against vacuous proofs and model check a small protocol exhaustively.

  • 4topics
  • 4lessons

Simulation shows that the traces you happened to run were correct. A formal property states what must hold on every trace, and a model checker or formal tool searches all of them within a model. This topic turns the two coherence invariants from Part 2 into properties, separates properties that a finite trace can refute from those that need an infinite one, shows how assumptions can make a proof meaningless, and ends with an explicit-state model checker that finds a seeded bug in a few milliseconds.

Lesson

After it you can...

SWMR as an Assertion

Write SWMR, the MOESI dirty rule and the data-value invariant as SVA and as a Python invariant with a ghost variable.

Safety Versus Liveness

Classify a property, write it with assert property, s_eventually or a bounded window, and name the fairness it needs.

Assumptions and Vacuity

Write legal environment assumptions, spot an over-constraint and prove a pass is not vacuous with covers.

Small Models and Parameters

Size a protocol model, explain why small configurations find most bugs, and read a counterexample trace.

Suggested order: the four lessons in sequence. They assume the SWMR and data-value invariants and the transient states of Parts 2 and 4, and the progress assumptions A1 to A6 of Stating Progress Assumptions. General formal method (what a proof is, bounded proofs, induction) lives in the First Principles of Verification Strategy course's Formal and Simulation part; this topic applies it to coherence.

Check yourself A formal tool reports that SWMR holds for your directory controller. Name two reasons the result could still be worthless.

The environment assumptions may exclude the traces that reach the bug (over-constraint), so the proof is about a smaller system than the real one. Or the property may be weaker than SWMR: for example it only counts M states and forgets that SM^D still serves loads, or it checks permissions but not values. Covers that reach the interesting scenarios, and a seeded bug the property must catch, address both.

Related topics

  • Shared course model

  • Part 2: the two invariants

  • Verification course: Formal and Simulation

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See also

  • Coherency Scoreboards and Reference Models
  • Coverage Closure and Waiver Governance