RDC Signoff Dashboard: Expanded Case Study

Extended case study

Milestone review flags RDC critical trend, waiver aging, milestone readiness around RDC Signoff Dashboard.

Background

Team believed crossings were stable until stress mode exposed intermittent anomalies.

Symptoms observed

• RDC critical trend, waiver aging, milestone readiness regression

• Mismatch between structural report and dynamic behavior

• Waiver debate under schedule pressure

Investigation timeline

1. Freeze design, reset, and tool configuration tags.

2. Reproduce failing scenario with minimized stimulus.

3. Map path/protocol/reset dependencies.

4. Classify root cause and containment options.

5. Execute minimal safe fix.

6. Run stress regression and review board.

Root cause

Root cause links to RDC Signoff Dashboard: An RDC dashboard tracks readiness across blocks and milestones, preventing unresolved reset risks from being hidden by aggregate pass rates.

Fix and validation

• Targeted RTL/protocol/reset correction

• Evidence refresh

• Signoff board decision

Lessons learned

• Treat waivers as temporary risk contracts

• Track owner and expiry

• Regression before closure

CASE STUDY — RDC Signoff Dashboard
critical issues before / after / signoff

Crossing sequence under stress

CROSSING FLOW — RDC Signoff Dashboard

source clock domain -> launch signal -> crossing structure -> destination sample
      |                    |                 |                    |
   source FF           protocol           sync / fifo         destination FF

Key metric: RDC critical trend, waiver aging, milestone readiness

CDC/RDC deep dive

RDC closure must connect IP assumptions to SoC reality.

Concept diagram

RDC CLOSURE

IP reset intent + SoC sequencing -> structural checks -> dynamic stress -> signoff

Metric graph

MILESTONE READINESS

M-2 55%
M-1 82%
M0  100%

Reports and artifacts

• top-level RDC opens

• reset simulation coverage

• chip integration blockers

• waiver backlog

Mini case study

Each IP was locally clean, but top-level sequencing violation created cross-subsystem boot intermittency.

Debug branches

• Audit subsystem assumptions

• stress chip-level reset scenarios

• close ownership gaps

Senior review question

Ask: what evidence proves this risk is closed for silicon, not just tool-clean?

Key takeaways

• State crossing class, assumptions, and owner with every issue.

• Run structural and dynamic regressions after each fix.

Common pitfalls

• Treating all warnings as equivalent risk.

• Waiving issues without containment evidence.

• Skipping reset and reconvergence stress after CDC fixes.

Principal CDC/RDC review addendum

An RDC dashboard tracks readiness across blocks and milestones, preventing unresolved reset risks from being hidden by aggregate pass rates.

Metric: RDC critical trend, waiver aging, milestone readiness